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Date:      Sat, 23 Nov 2002 12:17:10 -0800 (PST)
From:      Marcel Moolenaar <marcel@FreeBSD.org>
To:        Perforce Change Reviews <perforce@freebsd.org>
Subject:   PERFORCE change 21417 for review
Message-ID:  <200211232017.gANKHAAk090869@repoman.freebsd.org>

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http://perforce.freebsd.org/chv.cgi?CH=21417

Change 21417 by marcel@marcel_nfs on 2002/11/23 12:17:09

	Raw, untested implementation of EPC syscalls.

Affected files ...

.. //depot/projects/ia64/sys/ia64/ia64/syscall.s#4 edit

Differences ...

==== //depot/projects/ia64/sys/ia64/ia64/syscall.s#4 (text+ko) ====

@@ -70,13 +70,183 @@
 	.global		ia64_syscall_page
 ia64_syscall_page:
 
-	// XXX stub only
 	.global		epc_syscall
 	.proc		epc_syscall
+	.regstk		8,0,0,0
 epc_syscall:
 	epc
 	;;
-	mov		r8 = cr.lid	// Privileged instruction...
+	mov		r16=psr			// psr substitute
+	mov		r17=ar.rsc
+	mov		r18=sp
+	;;
+	mov		sp=ar.k6		// Kernel SP
+	mov		r19=r0			// cr.isr substitute
+	mov		ar.rsc=0
+	;;
+	mov		r20=ar.bspstore
+	mov		r21=ar.k5		// Kernel BSP
+	mov		r22=ar.rnat
+	mov		r23=ar.unat
+	mov		r24=b6			// cr.iip substitute
+	mov		r25=r9			// ar.pfs substitute
+	add		sp=-SIZEOF_TRAPFRAME,sp
+	;;
+	addl		r27=FRAME_SYSCALL,r0
+	mov		r26=pr
+	add		r30=0,sp
+	add		r31=8,sp
+	;;
+	st8		[r30]=r27,16		// tf_flags
+	st8		[r31]=r24,16		// tf_cr_iip
+	mov		r28=b0
+	;;
+	st8		[r30]=r16,24		// tf_cr_ipsr
+	st8		[r31]=r19,24		// tf_cr_isr
+	mov		r24=b1
+	;;
+	st8		[r30]=r26,16		// tf_pr
+	st8		[r31]=r17,24		// tf_ar_rsc
+	mov		r27=b2
+	;;
+	st8		[r30]=r25,24		// tf_ar_pfs
+	mov		r16=b3
+	mov		r17=b4
+	;;
+	st8		[r31]=r20,24		// tf_ar_bspstore
+	mov		ar.bspstore=r21		// Switch to kernel BSP
+	mov		r29=b5
+	;;
+	mov		r20=ar.ccv
+	mov		r21=ar.fpsr
+	;;
+	st8		[r30]=r22,24		// tf_ar_rnat
+	st8		[r31]=r23,16		// tf_ar_unat
+	;;
+	st8		[r30]=r20,32		// tf_ar_ccv
+	st8		[r31]=r21,32		// tf_ar_fpsr
+	;;
+	st8		[r30]=r28,16		// tf_b[0]
+	st8		[r31]=r24,16		// tf_b[1]
+	;;
+	st8		[r30]=r27,16		// tf_b[2]
+	st8		[r31]=r16,16		// tf_b[3]
+	;;
+	st8		[r30]=r17,TF_R_R1-(TF_B+4*8)	// tf_b[4]
+	st8		[r31]=r29,TF_R_R4-(TF_B+5*8)	// tf_b[5]
+	;;
+	st8		[r30]=r1,TF_R_R5-TF_R_R1	// tf_r[0] (=r1=gp)
+	.mem.offset 8,0
+	st8.spill	[r31]=r4,16		// tf_r[3] (=r4)
+	;;
+	.mem.offset 0,0
+	st8.spill	[r30]=r5,16		// tf_r[4] (=r5)
+	.mem.offset 8,0
+	st8.spill	[r31]=r6,TF_R_SP-TF_R_R6	// tf_r[5] (=r6)
+	;;
+	.mem.offset 0,0
+	st8.spill	[r30]=r7,TF_R_R15-TF_R_R7	// tf_r[6] (=r7)
+	st8		[r31]=r18		// tf_r[11] (=r12=sp)
+	;;
+	st8		[r30]=r8		// tf_r[14] (syscall number)
+	add		sp=-(8*8),sp
+	;;
+	add		r31=0,sp
+	add		r30=8,sp
+	;;
+	st8		[r31]=in0,16
+	st8		[r30]=in1,16
+	;;
+	st8		[r31]=in2,16
+	st8		[r30]=in3,16
+	;;
+	st8		[r31]=in4,16
+	st8		[r30]=in5,16
+	;;
+	st8		[r31]=in6
+	st8		[r30]=in7
+	;;
+	mov		r13=ar.k4		// PCPU
+	mov		r16=sp
+	mov		r17=ar.k5
+	cover
+	;;
+	mov		r18=ar.pfs		// cr.ifs substitute
+	mov		r19=ar.bsp
+	add		sp=-16,sp
+	;;
+	add		r20=TF_CR_IFS+(8*8),r16
+	sub		r19=r19,r17
+	add		r21=TF_NDIRTY+(8*8),r16
+	;;
+	st8		[r20]=r18		// tf_cr_ifs
+	st8		[r21]=r19		// tf_ndirty
+	;;
+	alloc		r14=ar.pfs,0,1,3,0
+	add		loc0=(8*8),r16
+	;;
+	mov		out0=r8			// syscall number
+	movl		gp=__gp
+	mov		out1=r16		// arguments
+	add		out2=(8*8),r16		// trapframe pointer
+	br.call.sptk	rp=syscall
+	;;
+	add		r15=0,loc0
+	add		r16=SIZEOF_TRAPFRAME,loc0
+	;;
+	add		r30=TF_R_R10,r15
+	add		r31=TF_R_SP,r15
+	;;
+	alloc		r14=ar.pfs,0,0,0,0
+	mov		ar.k6=r16
+	ld8		sp=[r31],TF_R_R9-TF_R_SP	// tf_r[11] (r12=sp)
+	;;
+	ld8		r10=[r30],-16		// tf_r[9] (=r10)
+	ld8		r9=[r31],TF_R_R1-TF_R_R9	// tf_r[8] (=r9)
+	;;
+	ld8		r8=[r30],TF_B-TF_R_R8	// tf_r[7] (=r8)
+	ld8		r1=[r31],TF_AR_FPSR-TF_R_R1	// tf_r[0] (=r1=gp)
+	;;
+	ld8		r16=[r30],-32		// tf_b[0]
+	ld8		r17=[r31],-16		// tf_ar_fpsr
+	;;
+	ld8	r18=[r30],-16		// restore ar.ccv, skip to ndirty
+	ld8	r19=[r31],-16		// restore ar.unat, skip to ar.rnat
+	mov	b0=r16
+	;;
+	ld8	r20=[r30],-16		// restore ndirty, skip to ar.bspstore
+	ld8	r21=[r31],-16		// restore ar.rnat, skip to cr.ifs
+	;;
+	ld8	r16=[r30],-16		// restore ar.bspstore, skip to ar.pfs
+	mov	ar.fpsr=r17
+	shl	r20=r20,16		// value for ar.rsc
+	;;
+	ld8	r22=[r31],-16		// restore cr.ifs, skip to ar.rsc
+	mov	ar.ccv=r18
+	;;
+	ld8	r17=[r30],-16		// restore ar.pfs, skip to pr
+	mov	ar.unat=r19
+	;;
+	ld8	r18=[r31],-32		// restore ar.rsc, skip to cr.ipsr
+	mov	ar.rsc=r20		// setup for loadrs
+	;;
+	loadrs				// restore user stacked registers
+	;;
+	mov	ar.bspstore=r16		// back to user backing store
+	mov	ar.pfs=r17
+	;;
+	mov	ar.rnat=r21
+	mov	ar.rsc=r18
+	;;
+	ld8	r16=[r30],-32		// restore pr, skip to cr.iip
+	ld8	r17=[r31]		// restore cr.ipsr
+	;;
+	ld8	r18=[r30]		// restore cr.iip
+	mov	cr.ifs=r22
+	;;
+	mov	cr.iip=r18
+	mov	cr.ipsr=r17
+	mov	pr=r16,0x1ffff
 	br.ret.sptk	rp
 	;;
 	.endp		epc_syscall

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