From owner-p4-projects@FreeBSD.ORG Fri Apr 4 17:01:55 2003 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 89EEF37B425; Fri, 4 Apr 2003 17:01:54 -0800 (PST) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 7383A37B404 for ; Fri, 4 Apr 2003 17:01:53 -0800 (PST) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 6ABBA43FA3 for ; Fri, 4 Apr 2003 17:01:52 -0800 (PST) (envelope-from peter@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.12.6/8.12.6) with ESMTP id h3511q0U086468 for ; Fri, 4 Apr 2003 17:01:52 -0800 (PST) (envelope-from peter@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.12.6/8.12.6/Submit) id h3511psA086465 for perforce@freebsd.org; Fri, 4 Apr 2003 17:01:51 -0800 (PST) Date: Fri, 4 Apr 2003 17:01:51 -0800 (PST) Message-Id: <200304050101.h3511psA086465@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to peter@freebsd.org using -f From: Peter Wemm To: Perforce Change Reviews Subject: PERFORCE change 28096 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 05 Apr 2003 01:01:55 -0000 http://perforce.freebsd.org/chv.cgi?CH=28096 Change 28096 by peter@peter_overcee on 2003/04/04 17:01:14 update some 64 bit inlines; still too many XXX's here Affected files ... .. //depot/projects/hammer/sys/x86_64/include/cpufunc.h#4 edit Differences ... ==== //depot/projects/hammer/sys/x86_64/include/cpufunc.h#4 (text+ko) ==== @@ -310,12 +310,12 @@ __asm __volatile("pause"); } -static __inline u_int -read_eflags(void) +static __inline u_long +read_rflags(void) { u_int ef; - __asm __volatile("pushfl; popl %0" : "=r" (ef)); + __asm __volatile("pushfl; XXX; popl %0" : "=r" (ef)); return (ef); } @@ -324,7 +324,7 @@ { u_int64_t rv; - __asm __volatile("rdmsr" : "=A" (rv) : "c" (msr)); + __asm __volatile("rdmsr XXX" : "=A" (rv) : "c" (msr)); return (rv); } @@ -333,7 +333,7 @@ { u_int64_t rv; - __asm __volatile("rdpmc" : "=A" (rv) : "c" (pmc)); + __asm __volatile("rdpmc XXX" : "=A" (rv) : "c" (pmc)); return (rv); } @@ -342,7 +342,7 @@ { u_int64_t rv; - __asm __volatile("rdtsc" : "=A" (rv)); + __asm __volatile("rdtsc XXX" : "=A" (rv)); return (rv); } @@ -353,68 +353,68 @@ } static __inline void -write_eflags(u_int ef) +write_rflags(u_long ef) { - __asm __volatile("pushl %0; popfl" : : "r" (ef)); + __asm __volatile("pushl %0; XXXpopfl" : : "r" (ef)); } static __inline void wrmsr(u_int msr, u_int64_t newval) { - __asm __volatile("wrmsr" : : "A" (newval), "c" (msr)); + __asm __volatile("wrmsr XXX" : : "A" (newval), "c" (msr)); } static __inline void -load_cr0(u_int data) +load_cr0(u_long data) { __asm __volatile("movl %0,%%cr0" : : "r" (data)); } -static __inline u_int +static __inline u_long rcr0(void) { - u_int data; + u_long data; __asm __volatile("movl %%cr0,%0" : "=r" (data)); return (data); } -static __inline u_int +static __inline u_long rcr2(void) { - u_int data; + u_long data; __asm __volatile("movl %%cr2,%0" : "=r" (data)); return (data); } static __inline void -load_cr3(u_int data) +load_cr3(u_long data) { __asm __volatile("movl %0,%%cr3" : : "r" (data) : "memory"); } -static __inline u_int +static __inline u_long rcr3(void) { - u_int data; + u_long data; __asm __volatile("movl %%cr3,%0" : "=r" (data)); return (data); } static __inline void -load_cr4(u_int data) +load_cr4(u_long data) { __asm __volatile("movl %0,%%cr4" : : "r" (data)); } -static __inline u_int +static __inline u_long rcr4(void) { - u_int data; + u_long data; __asm __volatile("movl %%cr4,%0" : "=r" (data)); return (data); @@ -435,7 +435,7 @@ * Only works on 486+ CPUs (i386 does not have PG_G). */ static __inline void -invlpg(u_int addr) +invlpg(u_long addr) { __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory"); @@ -623,8 +623,8 @@ int breakpoint(void); u_int bsfl(u_int mask); u_int bsrl(u_int mask); -void cpu_invlpg(u_int addr); -void cpu_invlpg_range(u_int start, u_int end); +void cpu_invlpg(u_long addr); +void cpu_invlpg_range(u_long start, u_long end); void disable_intr(void); void do_cpuid(u_int ax, u_int *p); void enable_intr(void);