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Subject: Re: Triton-II support... when?
To: terry@lambert.org (Terry Lambert)
Date: Wed, 6 Mar 96 9:52:53 MET
From: Greg Lehey <lehey.pad@sni.de>
Cc: hackers@freebsd.org (Hackers; FreeBSD)
In-Reply-To: <199603052308.QAA09368@phaeton.artisoft.com>; from "Terry Lambert" at Mar 5, 96 4:08 pm
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>>> Will FreeBSD 2.1-RELEASE boot/run on a P5 without the floating point
>>> bug?  The question is basically a non-sequitur -- there is no function
>>> difference in the chipsets except the Triton-II happens to work.
>>>
>> Are a lot of people running FreeBSD with their Level-2 caches off?
>
> Not "off"; with writeback disabled (pick "write through in BIOS CMOS,
> I believe).
>
>> As I understand it, there are much more profound changes than simply
>> one bug fix. I've been told that Triton-II:
>> o  adds support for concurrent PCI/ISA bus accesses
>
> Who uses ISA cards?

How many people have really 0 ISA boards in their machine?
Considering that ISA places such a load on the bus, it seems a good
idea to me.

>> o  adds support for ECC memory
>
> Still no parity, eh?  8-).

By itself?  I don't know.  If they have ECC, you'd think that they'd
allow you to just use the parity bit.

Greg