From owner-freebsd-ppc@FreeBSD.ORG Mon Jan 3 06:03:15 2011 Return-Path: Delivered-To: freebsd-ppc@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 7BE671065695 for ; Mon, 3 Jan 2011 06:03:15 +0000 (UTC) (envelope-from nwhitehorn@freebsd.org) Received: from mail.icecube.wisc.edu (trout.icecube.wisc.edu [128.104.255.119]) by mx1.freebsd.org (Postfix) with ESMTP id 523F08FC20 for ; Mon, 3 Jan 2011 06:03:15 +0000 (UTC) Received: from localhost (localhost.localdomain [127.0.0.1]) by mail.icecube.wisc.edu (Postfix) with ESMTP id B5E5558134 for ; Mon, 3 Jan 2011 00:03:14 -0600 (CST) X-Virus-Scanned: amavisd-new at icecube.wisc.edu Received: from mail.icecube.wisc.edu ([127.0.0.1]) by localhost (trout.icecube.wisc.edu [127.0.0.1]) (amavisd-new, port 10030) with ESMTP id PHZRFp8foduI for ; Mon, 3 Jan 2011 00:03:14 -0600 (CST) Received: from wanderer.tachypleus.net (unknown [76.210.75.5]) by mail.icecube.wisc.edu (Postfix) with ESMTP id 627275811F for ; Mon, 3 Jan 2011 00:03:14 -0600 (CST) Message-ID: <4D2166A1.90505@freebsd.org> Date: Mon, 03 Jan 2011 00:03:13 -0600 From: Nathan Whitehorn User-Agent: Mozilla/5.0 (X11; U; FreeBSD amd64; en-US; rv:1.9.2.13) Gecko/20101227 Thunderbird/3.1.7 MIME-Version: 1.0 To: freebsd-ppc@freebsd.org References: In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: Dumping core regs under freebsd X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Jan 2011 06:03:15 -0000 On 01/02/11 23:53, Sandeep Kumar wrote: > HI all, > > > I am facing some issue with on MPC8548E platform and I am seeing a machine > check interrupt while a soft reset is done. > > Can someone help in letting me know how to dump the internal core regs like > MSR, MCAR, etc under freebsd. > > I want to know the status of the core registers when this happens. > 'show registers' will show at least some of these when this happens. Most of MSR is copied to SRR0 when an exception is taken. -Nathan