From owner-freebsd-current Wed Apr 24 00:47:53 1996 Return-Path: owner-current Received: (from root@localhost) by freefall.freebsd.org (8.7.3/8.7.3) id AAA25566 for current-outgoing; Wed, 24 Apr 1996 00:47:53 -0700 (PDT) Received: from irz301.inf.tu-dresden.de (irz301.inf.tu-dresden.de [141.76.1.11]) by freefall.freebsd.org (8.7.3/8.7.3) with SMTP id AAA25552 for ; Wed, 24 Apr 1996 00:47:38 -0700 (PDT) Received: from sax.sax.de by irz301.inf.tu-dresden.de (8.6.12/8.6.12-s1) with ESMTP id JAA11196; Wed, 24 Apr 1996 09:41:34 +0200 Received: by sax.sax.de (8.6.11/8.6.12-s1) with UUCP id JAA21278; Wed, 24 Apr 1996 09:41:34 +0200 Received: (from j@localhost) by uriah.heep.sax.de (8.7.5/8.6.9) id JAA26732; Wed, 24 Apr 1996 09:30:13 +0200 (MET DST) From: J Wunsch Message-Id: <199604240730.JAA26732@uriah.heep.sax.de> Subject: Re: MotherBoard Jumper Settings... To: freebsd-current@FreeBSD.org (FreeBSD-current users) Date: Wed, 24 Apr 1996 09:30:12 +0200 (MET DST) Cc: cat@ki.net, geoff@ki.net, scrappy@ki.net (Marc G. Fournier) Reply-To: joerg_wunsch@uriah.heep.sax.de (Joerg Wunsch) In-Reply-To: from "Marc G. Fournier" at Apr 23, 96 11:30:11 pm X-Phone: +49-351-2012 669 X-Mailer: ELM [version 2.4 PL24 ME8a] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: owner-current@FreeBSD.org X-Loop: FreeBSD.org Precedence: bulk As Marc G. Fournier wrote: > Third, the Oscillator Frequency was set for 33Mhz instead > of 25Mhz...have fixed it... (Others told you that a DX4 is 3x, so the 33 MHz was right.) > As far as the cache is concerned, I have: > > 4x UM61512AK-15/95282/N52049's > 1x W24129AK-15/95200 (Tag SRAM) > > Am I correct in assuming that the -15 is the speed of the cache? > If so, and I haven't changed that one yet, my CMOS is set for 20ns... > would that produce any of the bugs I've been reporting? I don't think so. The tag RAM is IMHO normally faster than the cache, perhaps that's why they kept the cache timing slower than necessary in the setup. > The jumpers for the cache are set for 256KB/64kbx4...how do I > determine the size of each of the cache chips to determine if *this* is > right? The 61512 suggests a 512 Kbit cache. Seems you are using only half of it with your jumper setting. > What is "the ECP DMA Channel"? Its currently set for DMA 3... > is that correct? This hypermodern parallel channel. We don't use it, and most likely, you don't even have it enabled, but are using it in dumb Centronics compatibility mode. -- cheers, J"org joerg_wunsch@uriah.heep.sax.de -- http://www.sax.de/~joerg/ -- NIC: JW11-RIPE Never trust an operating system you don't have sources for. ;-)