From owner-p4-projects@FreeBSD.ORG Wed Jan 2 08:34:08 2008 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 8D07216A41A; Wed, 2 Jan 2008 08:34:08 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 51B0F16A418 for ; Wed, 2 Jan 2008 08:34:08 +0000 (UTC) (envelope-from imp@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 4251413C45A for ; Wed, 2 Jan 2008 08:34:08 +0000 (UTC) (envelope-from imp@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id m028Y8Rq014852 for ; Wed, 2 Jan 2008 08:34:08 GMT (envelope-from imp@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id m028Y89m014848 for perforce@freebsd.org; Wed, 2 Jan 2008 08:34:08 GMT (envelope-from imp@freebsd.org) Date: Wed, 2 Jan 2008 08:34:08 GMT Message-Id: <200801020834.m028Y89m014848@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to imp@freebsd.org using -f From: Warner Losh To: Perforce Change Reviews Cc: Subject: PERFORCE change 132295 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 02 Jan 2008 08:34:09 -0000 http://perforce.freebsd.org/chv.cgi?CH=132295 Change 132295 by imp@imp_paco-paco on 2008/01/02 08:33:34 Update for changes since 6.1. # I'm unsure about the inb/outb stuff that remains... Affected files ... .. //depot/projects/mips2-jnpr/src/sys/mips/include/bus.h#4 edit Differences ... ==== //depot/projects/mips2-jnpr/src/sys/mips/include/bus.h#4 (text+ko) ==== @@ -786,120 +786,108 @@ /* - * Flags used in various bus DMA methods. + * Bus read/write barrier methods. + * + * void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, + * bus_size_t offset, bus_size_t len, int flags); + * + * + * Note that BUS_SPACE_BARRIER_WRITE doesn't do anything other than + * prevent reordering by the compiler; all Intel x86 processors currently + * retire operations outside the CPU in program order. */ -#define BUS_DMA_WAITOK 0x00 /* safe to sleep (pseudo-flag) */ -#define BUS_DMA_NOWAIT 0x01 /* not safe to sleep */ -#define BUS_DMA_ALLOCNOW 0x02 /* perform resource allocation now */ -#define BUS_DMAMEM_NOSYNC 0x04 /* map memory to not require sync */ -#define BUS_DMA_ISA 0x10 /* map memory for ISA dma */ -#define BUS_DMA_BUS2 0x20 /* placeholders for bus functions... */ -#define BUS_DMA_BUS3 0x40 -#define BUS_DMA_BUS4 0x80 +#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ +#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ -/* Forwards needed by prototypes below. */ -struct mbuf; -struct uio; +static __inline void +bus_space_barrier(bus_space_tag_t tag __unused, bus_space_handle_t bsh __unused, + bus_size_t offset __unused, bus_size_t len __unused, int flags) +{ +#if 0 +#ifdef __GNUCLIKE_ASM + if (flags & BUS_SPACE_BARRIER_READ) + __asm __volatile("lock; addl $0,0(%%rsp)" : : : "memory"); + else + __asm __volatile("" : : : "memory"); +#endif +#endif +} -/* - * bus_dma_segment_t - * - * Describes a single contiguous DMA transaction. Values - * are suitable for programming into DMA registers. - */ -typedef struct bus_dma_segment { - bus_addr_t ds_addr; /* DMA address */ - bus_size_t ds_len; /* length of transfer */ -} bus_dma_segment_t; +#ifdef BUS_SPACE_NO_LEGACY +#undef inb +#undef outb +#define inb(a) compiler_error +#define inw(a) compiler_error +#define inl(a) compiler_error +#define outb(a, b) compiler_error +#define outw(a, b) compiler_error +#define outl(a, b) compiler_error +#endif -/* - * A function that returns 1 if the address cannot be accessed by - * a device and 0 if it can be. - */ -typedef int bus_dma_filter_t(void *, bus_addr_t); +#include /* - * Allocate a device specific dma_tag encapsulating the constraints of - * the parent tag in addition to other restrictions specified: - * - * alignment: alignment for segments. - * boundary: Boundary that segments cannot cross. - * lowaddr: Low restricted address that cannot appear in a mapping. - * highaddr: High restricted address that cannot appear in a mapping. - * filtfunc: An optional function to further test if an address - * within the range of lowaddr and highaddr cannot appear - * in a mapping. - * filtfuncarg: An argument that will be passed to filtfunc in addition - * to the address to test. - * maxsize: Maximum mapping size supported by this tag. - * nsegments: Number of discontinuities allowed in maps. - * maxsegsz: Maximum size of a segment in the map. - * flags: Bus DMA flags. - * dmat: A pointer to set to a valid dma tag should the return - * value of this function indicate success. + * Stream accesses are the same as normal accesses on amd64; there are no + * supported bus systems with an endianess different from the host one. */ -/* XXX Should probably allow specification of alignment */ -int bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignemnt, - bus_size_t boundary, bus_addr_t lowaddr, - bus_addr_t highaddr, bus_dma_filter_t *filtfunc, - void *filtfuncarg, bus_size_t maxsize, int nsegments, - bus_size_t maxsegsz, int flags, bus_dma_tag_t *dmat); +#define bus_space_read_stream_1(t, h, o) bus_space_read_1((t), (h), (o)) +#define bus_space_read_stream_2(t, h, o) bus_space_read_2((t), (h), (o)) +#define bus_space_read_stream_4(t, h, o) bus_space_read_4((t), (h), (o)) -int bus_dma_tag_destroy(bus_dma_tag_t dmat); +#define bus_space_read_multi_stream_1(t, h, o, a, c) \ + bus_space_read_multi_1((t), (h), (o), (a), (c)) +#define bus_space_read_multi_stream_2(t, h, o, a, c) \ + bus_space_read_multi_2((t), (h), (o), (a), (c)) +#define bus_space_read_multi_stream_4(t, h, o, a, c) \ + bus_space_read_multi_4((t), (h), (o), (a), (c)) -/* - * Allocate a handle for mapping from kva/uva/physical - * address space into bus device space. - */ -int bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp); +#define bus_space_write_stream_1(t, h, o, v) \ + bus_space_write_1((t), (h), (o), (v)) +#define bus_space_write_stream_2(t, h, o, v) \ + bus_space_write_2((t), (h), (o), (v)) +#define bus_space_write_stream_4(t, h, o, v) \ + bus_space_write_4((t), (h), (o), (v)) -/* - * Destroy a handle for mapping from kva/uva/physical - * address space into bus device space. - */ -int bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map); +#define bus_space_write_multi_stream_1(t, h, o, a, c) \ + bus_space_write_multi_1((t), (h), (o), (a), (c)) +#define bus_space_write_multi_stream_2(t, h, o, a, c) \ + bus_space_write_multi_2((t), (h), (o), (a), (c)) +#define bus_space_write_multi_stream_4(t, h, o, a, c) \ + bus_space_write_multi_4((t), (h), (o), (a), (c)) -/* - * Allocate a piece of memory that can be efficiently mapped into - * bus device space based on the constraints lited in the dma tag. - * A dmamap to for use with dmamap_load is also allocated. - */ -int bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags, - bus_dmamap_t *mapp); +#define bus_space_set_multi_stream_1(t, h, o, v, c) \ + bus_space_set_multi_1((t), (h), (o), (v), (c)) +#define bus_space_set_multi_stream_2(t, h, o, v, c) \ + bus_space_set_multi_2((t), (h), (o), (v), (c)) +#define bus_space_set_multi_stream_4(t, h, o, v, c) \ + bus_space_set_multi_4((t), (h), (o), (v), (c)) -/* - * Free a piece of memory and it's allociated dmamap, that was allocated - * via bus_dmamem_alloc. - */ -void bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map); +#define bus_space_read_region_stream_1(t, h, o, a, c) \ + bus_space_read_region_1((t), (h), (o), (a), (c)) +#define bus_space_read_region_stream_2(t, h, o, a, c) \ + bus_space_read_region_2((t), (h), (o), (a), (c)) +#define bus_space_read_region_stream_4(t, h, o, a, c) \ + bus_space_read_region_4((t), (h), (o), (a), (c)) -/* - * A function that processes a successfully loaded dma map or an error - * from a delayed load map. - */ -typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int); +#define bus_space_write_region_stream_1(t, h, o, a, c) \ + bus_space_write_region_1((t), (h), (o), (a), (c)) +#define bus_space_write_region_stream_2(t, h, o, a, c) \ + bus_space_write_region_2((t), (h), (o), (a), (c)) +#define bus_space_write_region_stream_4(t, h, o, a, c) \ + bus_space_write_region_4((t), (h), (o), (a), (c)) -/* - * Map the buffer buf into bus space using the dmamap map. - */ -int bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf, - bus_size_t buflen, bus_dmamap_callback_t *callback, - void *callback_arg, int flags); +#define bus_space_set_region_stream_1(t, h, o, v, c) \ + bus_space_set_region_1((t), (h), (o), (v), (c)) +#define bus_space_set_region_stream_2(t, h, o, v, c) \ + bus_space_set_region_2((t), (h), (o), (v), (c)) +#define bus_space_set_region_stream_4(t, h, o, v, c) \ + bus_space_set_region_4((t), (h), (o), (v), (c)) -/* - * Perform a syncronization operation on the given map. - */ -void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_dmasync_op_t); -#define bus_dmamap_sync(dmat, dmamap, op) \ - if ((dmamap) != NULL) \ - _bus_dmamap_sync(dmat, dmamap, op) - -/* - * Release the mapping held by map. - */ -void _bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map); -#define bus_dmamap_unload(dmat, dmamap) \ - if ((dmamap) != NULL) \ - _bus_dmamap_unload(dmat, dmamap) +#define bus_space_copy_region_stream_1(t, h1, o1, h2, o2, c) \ + bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c)) +#define bus_space_copy_region_stream_2(t, h1, o1, h2, o2, c) \ + bus_space_copy_region_2((t), (h1), (o1), (h2), (o2), (c)) +#define bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c) \ + bus_space_copy_region_4((t), (h1), (o1), (h2), (o2), (c)) #endif /* !_MACHINE_BUS_H_ */