From owner-freebsd-mips@FreeBSD.ORG Tue Jan 6 03:10:07 2015 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 419B14CC for ; Tue, 6 Jan 2015 03:10:07 +0000 (UTC) Received: from mail-ie0-f178.google.com (mail-ie0-f178.google.com [209.85.223.178]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 05D592048 for ; Tue, 6 Jan 2015 03:10:06 +0000 (UTC) Received: by mail-ie0-f178.google.com with SMTP id vy18so704209iec.9 for ; Mon, 05 Jan 2015 19:10:06 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:subject:mime-version:content-type:from :in-reply-to:date:cc:message-id:references:to; bh=pYCQHaKsFhur0qC0TcGiyzAaBvte7L4FbNfBpZF1az0=; b=MeOsrOEMdawH/HFuj8Ou4xECDb6rxC7Q88hb26VwXaA+PqAwlmSUaWTZ/vmF6C9Qfz q3an3dFic6a/yonlUKC+7WFtCMMm3q1gN+gs+NLBBBBQNUbMBgb8O7g4DYk3bF5SfMkT huGojMA0BEVuDLTdGmmEvxTkokQ65BHB+y488ChwCnf/NIWNrT2n6YGjaI1QM3m2jmmu R/pd4vg1apKcUMGxOM2kVPrFujAobPJvwbuOlK51XChfzIlq2jrSmn63zfnGXBB8oxIl eUDfut8eYNW5nN4PicSjIIevQ+d4B4DP2QcDGMdwEuaymsV3lBNmczXeOKDP46Bp7ylm FQCw== X-Gm-Message-State: ALoCoQmlO1Th6iLADNVwp+1a5jKUa/1c1KJ4V5VaZq+L3iRux8bwnNPACugGC/ek/fc/UCPvgoT1 X-Received: by 10.42.253.195 with SMTP id nb3mr5558804icb.34.1420513805881; Mon, 05 Jan 2015 19:10:05 -0800 (PST) Received: from netflix-mac-wired.bsdimp.com ([50.253.99.174]) by mx.google.com with ESMTPSA id aw9sm4457916igc.18.2015.01.05.19.10.04 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 05 Jan 2015 19:10:05 -0800 (PST) Sender: Warner Losh Subject: Re: interrupt muxes, bus memory space and other fun amusing things Mime-Version: 1.0 (Mac OS X Mail 8.1 \(1993\)) Content-Type: multipart/signed; boundary="Apple-Mail=_5E74F1EF-78EE-4895-9FE8-3630FEEFDAB6"; protocol="application/pgp-signature"; micalg=pgp-sha512 X-Pgp-Agent: GPGMail 2.5b3 From: Warner Losh In-Reply-To: Date: Mon, 5 Jan 2015 20:10:04 -0700 Message-Id: <9F6D585C-7590-4D25-879B-A76D8A959E01@bsdimp.com> References: <5F7CBB50-6C91-49C9-BF69-301496DDE792@bsdimp.com> To: Adrian Chadd X-Mailer: Apple Mail (2.1993) Cc: Warner Losh , Ian Lepore , John Baldwin , "freebsd-mips@freebsd.org" X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Jan 2015 03:10:07 -0000 --Apple-Mail=_5E74F1EF-78EE-4895-9FE8-3630FEEFDAB6 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=utf-8 > On Jan 5, 2015, at 1:31 PM, Adrian Chadd wrote: >=20 > On 5 January 2015 at 08:41, Warner Losh wrote: >>=20 >>> So if I were Linux, I'd just implement a mux that pretends to = trigger >>> interrupts in a much bigger IRQ space. Ie, they map IP0..IP7 to >>> irq0..7, then they pick another IRQ range for the AHB interrupts, = and >>> another IRQ range for the IP2/IP3 interrupt mux. They have a >>> hard-coded mux that takes care of triggering the software IRQ based = on >>> the hardware interrupt and mux register contents. >>>=20 >>> So, how should I approach this? >>=20 >> Same way. You=E2=80=99d create an interrupt device that registers an = interrupt >> for the mux, then farms it out based on the contents of the = registers. >> The MIPS interrupt handler might need some work (arm did) to >> allow this to happen, but it isn=E2=80=99t super difficult (though = IIRc it is tedious). >=20 > Ok. So I can do that, but then devices hang off of which bus? nexus0? > Or this mux? >=20 > Can I create a mux bus to hang things off of that just pass all the > memory region requests up to the parent bus (nexus in this case) ? The hard part is mapping an interrupt provided by a mux to a resource number. However, we already do this for the =E2=80=98hard wired=E2=80=99 = interrupts that are muxed through APIC or PIC controllers on x86. I fail to see how this is any different, apart (perhaps) from the need to do things = dynamically in some way. Warner --Apple-Mail=_5E74F1EF-78EE-4895-9FE8-3630FEEFDAB6 Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename=signature.asc Content-Type: application/pgp-signature; name=signature.asc Content-Description: Message signed with OpenPGP using GPGMail -----BEGIN PGP SIGNATURE----- Comment: GPGTools - https://gpgtools.org iQIcBAEBCgAGBQJUq1IMAAoJEGwc0Sh9sBEAFyQQAOXZ4xZQwhR3shuyzDifDy25 /F6t4cjbLZbEEWTAoOpTmIVZQkiXplZJ8qQkvzNXVOhYhYFrYTz2NzcGqv2OuWzH /pSz5STyg8llMKgmMQr30ccZamwjmPDKrasqrQJB1dCZnHCzBiJyNRLvSlwHhn4Q WJeRthfvmWduV3Yg8eGvlr0sNX+6Tb1XqmuTFjCZF/vUPQRnLZf/s44rry+ahSHb e6g3zAK+XmprChXgBW2b66q3dZa7kuWAaYepCfGDcjsiPBu957IBsjJ67KO7KGm4 TRs3XKmjL4dzJJ1fxp46B28ZysllkMz2fJ5XBs2QdsxpF1aMG5iGMvPq80RLVo9Q ZWkOPwgAQEQ7Z2cXjKWU3vwAPepx13BoFPKrfc9AXFUpAZ0ZjpXPdlCFb8fK2z0g qRVaTO+5Qz2vO427KDDppNX5b9qDL2CmljWJ/khcEByFjmjl+Jqq6G52nWCyhNBT /tvpsyiF8i/umriNwD3r+/apdexVwYxc8NE5btcjNQ9w96v3N86sFClBTQ9vihj5 zmGaAnN9L1nrHMfK+Z9K9mz0qNJXwGo9INGRsqn3VVS8aRngSwubF74v5AoHo5eB Tza4RfuGA0g2KoRpvpT3EcY7WVRGfeL7evmEbIi3EAEIJ+nmV3oFCDBtdfMqb8zz rMM+aoQh7XGKIfYjl+q+ =zvzM -----END PGP SIGNATURE----- --Apple-Mail=_5E74F1EF-78EE-4895-9FE8-3630FEEFDAB6--