From owner-svn-src-all@freebsd.org Fri Jun 19 18:34:28 2020 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id E6D12335DA0; Fri, 19 Jun 2020 18:34:28 +0000 (UTC) (envelope-from mmel@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 49pSBr5rR5z4d5C; Fri, 19 Jun 2020 18:34:28 +0000 (UTC) (envelope-from mmel@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id C3DF31F736; Fri, 19 Jun 2020 18:34:28 +0000 (UTC) (envelope-from mmel@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 05JIYSM5068453; Fri, 19 Jun 2020 18:34:28 GMT (envelope-from mmel@FreeBSD.org) Received: (from mmel@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 05JIYR35068447; Fri, 19 Jun 2020 18:34:27 GMT (envelope-from mmel@FreeBSD.org) Message-Id: <202006191834.05JIYR35068447@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mmel set sender to mmel@FreeBSD.org using -f From: Michal Meloun Date: Fri, 19 Jun 2020 18:34:27 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r362405 - in head/sys: arm/allwinner arm/amlogic/aml8726 arm64/rockchip dev/altera/dwc dev/dwc X-SVN-Group: head X-SVN-Commit-Author: mmel X-SVN-Commit-Paths: in head/sys: arm/allwinner arm/amlogic/aml8726 arm64/rockchip dev/altera/dwc dev/dwc X-SVN-Commit-Revision: 362405 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Jun 2020 18:34:29 -0000 Author: mmel Date: Fri Jun 19 18:34:27 2020 New Revision: 362405 URL: https://svnweb.freebsd.org/changeset/base/362405 Log: Finish renaming in if_dwc. By using DWC TRM terminology, normal descriptor format should be named extended and alternate descriptor format should be named normal. Should not been functional change. MFC after: 4 weeks Modified: head/sys/arm/allwinner/aw_if_dwc.c head/sys/arm/amlogic/aml8726/aml8726_if_dwc.c head/sys/arm64/rockchip/if_dwc_rk.c head/sys/dev/altera/dwc/if_dwc_socfpga.c head/sys/dev/dwc/if_dwc.c head/sys/dev/dwc/if_dwc.h head/sys/dev/dwc/if_dwc_if.m Modified: head/sys/arm/allwinner/aw_if_dwc.c ============================================================================== --- head/sys/arm/allwinner/aw_if_dwc.c Fri Jun 19 18:27:22 2020 (r362404) +++ head/sys/arm/allwinner/aw_if_dwc.c Fri Jun 19 18:34:27 2020 (r362405) @@ -114,7 +114,7 @@ static int a20_if_dwc_mac_type(device_t dev) { - return (DWC_GMAC_ALT_DESC); + return (DWC_GMAC_NORMAL_DESC); } static int Modified: head/sys/arm/amlogic/aml8726/aml8726_if_dwc.c ============================================================================== --- head/sys/arm/amlogic/aml8726/aml8726_if_dwc.c Fri Jun 19 18:27:22 2020 (r362404) +++ head/sys/arm/amlogic/aml8726/aml8726_if_dwc.c Fri Jun 19 18:34:27 2020 (r362405) @@ -66,7 +66,7 @@ static int aml8726_if_dwc_mac_type(device_t dev) { - return (DWC_GMAC_ALT_DESC); + return (DWC_GMAC_NORMAL_DESC); } static int Modified: head/sys/arm64/rockchip/if_dwc_rk.c ============================================================================== --- head/sys/arm64/rockchip/if_dwc_rk.c Fri Jun 19 18:27:22 2020 (r362404) +++ head/sys/arm64/rockchip/if_dwc_rk.c Fri Jun 19 18:34:27 2020 (r362405) @@ -160,7 +160,7 @@ static int if_dwc_rk_mac_type(device_t dev) { - return (DWC_GMAC_ALT_DESC); + return (DWC_GMAC_NORMAL_DESC); } static int Modified: head/sys/dev/altera/dwc/if_dwc_socfpga.c ============================================================================== --- head/sys/dev/altera/dwc/if_dwc_socfpga.c Fri Jun 19 18:27:22 2020 (r362404) +++ head/sys/dev/altera/dwc/if_dwc_socfpga.c Fri Jun 19 18:34:27 2020 (r362405) @@ -74,7 +74,7 @@ static int if_dwc_socfpga_mac_type(device_t dev) { - return (DWC_GMAC); + return (DWC_GMAC_EXT_DESC); } static int Modified: head/sys/dev/dwc/if_dwc.c ============================================================================== --- head/sys/dev/dwc/if_dwc.c Fri Jun 19 18:27:22 2020 (r362404) +++ head/sys/dev/dwc/if_dwc.c Fri Jun 19 18:34:27 2020 (r362405) @@ -249,7 +249,7 @@ dwc_setup_txdesc(struct dwc_softc *sc, int idx, bus_ad flags = 0; --sc->txcount; } else { - if (sc->mactype == DWC_GMAC_ALT_DESC) + if (sc->mactype != DWC_GMAC_EXT_DESC) flags = NTDESC1_TCH | NTDESC1_FS | NTDESC1_LS | NTDESC1_IC; else @@ -259,7 +259,7 @@ dwc_setup_txdesc(struct dwc_softc *sc, int idx, bus_ad } sc->txdesc_ring[idx].addr1 = (uint32_t)(paddr); - if (sc->mactype == DWC_GMAC_ALT_DESC) { + if (sc->mactype != DWC_GMAC_EXT_DESC) { sc->txdesc_ring[idx].desc0 = 0; sc->txdesc_ring[idx].desc1 = flags | len; } else { @@ -537,7 +537,7 @@ dwc_setup_rxdesc(struct dwc_softc *sc, int idx, bus_ad nidx = next_rxidx(sc, idx); sc->rxdesc_ring[idx].addr2 = sc->rxdesc_ring_paddr + (nidx * sizeof(struct dwc_hwdesc)); - if (sc->mactype == DWC_GMAC_ALT_DESC) + if (sc->mactype != DWC_GMAC_EXT_DESC) sc->rxdesc_ring[idx].desc1 = NRDESC1_RCH | RX_MAX_PACKET; else sc->rxdesc_ring[idx].desc1 = ERDESC1_RCH | MCLBYTES; @@ -661,7 +661,7 @@ dwc_hash_maddr(void *arg, struct sockaddr_dl *sdl, u_i crc = ether_crc32_le(LLADDR(sdl), ETHER_ADDR_LEN); /* Take lower 8 bits and reverse it */ val = bitreverse(~crc & 0xff); - if (ctx->sc->mactype == DWC_GMAC_ALT_DESC) + if (ctx->sc->mactype != DWC_GMAC_EXT_DESC) val >>= 2; /* Only need lower 6 bits */ hashreg = (val >> 5); hashbit = (val & 31); @@ -682,7 +682,7 @@ dwc_setup_rxfilter(struct dwc_softc *sc) DWC_ASSERT_LOCKED(sc); ifp = sc->ifp; - nhash = sc->mactype == DWC_GMAC_ALT_DESC ? 2 : 8; + nhash = sc->mactype != DWC_GMAC_EXT_DESC ? 2 : 8; /* * Set the multicast (group) filter hash. @@ -715,7 +715,7 @@ dwc_setup_rxfilter(struct dwc_softc *sc) WRITE4(sc, MAC_ADDRESS_LOW(0), lo); WRITE4(sc, MAC_ADDRESS_HIGH(0), hi); WRITE4(sc, MAC_FRAME_FILTER, ffval); - if (sc->mactype == DWC_GMAC_ALT_DESC) { + if (sc->mactype != DWC_GMAC_EXT_DESC) { WRITE4(sc, GMAC_MAC_HTLOW, ctx.hash[0]); WRITE4(sc, GMAC_MAC_HTHIGH, ctx.hash[1]); } else { @@ -1260,7 +1260,7 @@ dwc_attach(device_t dev) return (ENXIO); } - if (sc->mactype == DWC_GMAC_ALT_DESC) { + if (sc->mactype != DWC_GMAC_EXT_DESC) { reg = BUS_MODE_FIXEDBURST; reg |= (BUS_MODE_PRIORXTX_41 << BUS_MODE_PRIORXTX_SHIFT); } else Modified: head/sys/dev/dwc/if_dwc.h ============================================================================== --- head/sys/dev/dwc/if_dwc.h Fri Jun 19 18:27:22 2020 (r362404) +++ head/sys/dev/dwc/if_dwc.h Fri Jun 19 18:34:27 2020 (r362405) @@ -272,8 +272,9 @@ #define CURRENT_HOST_RECEIVE_BUF_ADDR 0x1054 #define HW_FEATURE 0x1058 -#define DWC_GMAC 0x1 -#define DWC_GMAC_ALT_DESC 0x2 +#define DWC_GMAC_NORMAL_DESC 0x1 +#define DWC_GMAC_EXT_DESC 0x2 + #define GMAC_MII_CLK_60_100M_DIV42 0x0 #define GMAC_MII_CLK_100_150M_DIV62 0x1 #define GMAC_MII_CLK_25_35M_DIV16 0x2 Modified: head/sys/dev/dwc/if_dwc_if.m ============================================================================== --- head/sys/dev/dwc/if_dwc_if.m Fri Jun 19 18:27:22 2020 (r362404) +++ head/sys/dev/dwc/if_dwc_if.m Fri Jun 19 18:34:27 2020 (r362405) @@ -41,7 +41,7 @@ CODE { static int if_dwc_default_mac_type(device_t dev) { - return (DWC_GMAC); + return (DWC_GMAC_EXT_DESC); } static int