From owner-cvs-src@FreeBSD.ORG Tue Oct 10 23:23:13 2006 Return-Path: X-Original-To: cvs-src@FreeBSD.org Delivered-To: cvs-src@FreeBSD.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 634F216A40F; Tue, 10 Oct 2006 23:23:13 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 0E8EF43D49; Tue, 10 Oct 2006 23:23:13 +0000 (GMT) (envelope-from jhb@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.6/8.13.6) with ESMTP id k9ANNCv9095557; Tue, 10 Oct 2006 23:23:12 GMT (envelope-from jhb@repoman.freebsd.org) Received: (from jhb@localhost) by repoman.freebsd.org (8.13.6/8.13.4/Submit) id k9ANNCYg095555; Tue, 10 Oct 2006 23:23:12 GMT (envelope-from jhb) Message-Id: <200610102323.k9ANNCYg095555@repoman.freebsd.org> From: John Baldwin Date: Tue, 10 Oct 2006 23:23:12 +0000 (UTC) To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org X-FreeBSD-CVS-Branch: HEAD Cc: Subject: cvs commit: src/sys/amd64/amd64 intr_machdep.c io_apic.c local_apic.c machdep.c mp_machdep.c src/sys/amd64/include apicvar.h intr_machdep.h src/sys/amd64/isa atpic.c src/sys/i386/i386 intr_machdep.c io_apic.c local_apic.c ... X-BeenThere: cvs-src@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 Oct 2006 23:23:13 -0000 jhb 2006-10-10 23:23:12 UTC FreeBSD src repository Modified files: sys/amd64/amd64 intr_machdep.c io_apic.c local_apic.c machdep.c mp_machdep.c sys/amd64/include apicvar.h intr_machdep.h sys/amd64/isa atpic.c sys/i386/i386 intr_machdep.c io_apic.c local_apic.c mp_machdep.c sys/i386/include apicvar.h intr_machdep.h sys/i386/isa atpic.c Log: Change the x86 interrupt code to suspend/resume interrupt controllers (PICs) rather than interrupt sources. This allows interrupt controllers with no interrupt pics (such as the 8259As when APIC is in use) to participate in suspend/resume. - Always register the 8259A PICs even if we don't use any of their pins. - Explicitly reset the 8259As on resume on amd64 if 'device atpic' isn't included. - Add a "dummy" PIC for the local APIC on the BSP to reset the local APIC on resume. This gets suspend/resume working with APIC on UP systems. SMP still needs more work to bring the APs back to life. The MFC after is tentative. Tested by: anholt (i386) Submitted by: Andrea Bittau (3) MFC after: 1 week Revision Changes Path 1.21 +74 -10 src/sys/amd64/amd64/intr_machdep.c 1.25 +8 -15 src/sys/amd64/amd64/io_apic.c 1.32 +21 -5 src/sys/amd64/amd64/local_apic.c 1.655 +1 -13 src/sys/amd64/amd64/machdep.c 1.278 +1 -1 src/sys/amd64/amd64/mp_machdep.c 1.19 +1 -1 src/sys/amd64/include/apicvar.h 1.11 +7 -2 src/sys/amd64/include/intr_machdep.h 1.20 +14 -9 src/sys/amd64/isa/atpic.c 1.20 +48 -10 src/sys/i386/i386/intr_machdep.c 1.29 +8 -14 src/sys/i386/i386/io_apic.c 1.34 +21 -5 src/sys/i386/i386/local_apic.c 1.271 +1 -1 src/sys/i386/i386/mp_machdep.c 1.19 +1 -1 src/sys/i386/include/apicvar.h 1.13 +4 -2 src/sys/i386/include/intr_machdep.h 1.26 +14 -9 src/sys/i386/isa/atpic.c