From owner-svn-src-stable@FreeBSD.ORG Wed Mar 18 03:36:09 2009 Return-Path: Delivered-To: svn-src-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 39C6D106567D; Wed, 18 Mar 2009 03:36:09 +0000 (UTC) (envelope-from yongari@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 0B6498FC19; Wed, 18 Mar 2009 03:36:09 +0000 (UTC) (envelope-from yongari@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n2I3a8oO014552; Wed, 18 Mar 2009 03:36:08 GMT (envelope-from yongari@svn.freebsd.org) Received: (from yongari@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n2I3a80G014550; Wed, 18 Mar 2009 03:36:08 GMT (envelope-from yongari@svn.freebsd.org) Message-Id: <200903180336.n2I3a80G014550@svn.freebsd.org> From: Pyun YongHyeon Date: Wed, 18 Mar 2009 03:36:08 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-7@freebsd.org X-SVN-Group: stable-7 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r189954 - in stable/7/sys: . contrib/pf dev/ath/ath_hal dev/cxgb dev/mii X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 18 Mar 2009 03:36:10 -0000 Author: yongari Date: Wed Mar 18 03:36:08 2009 New Revision: 189954 URL: http://svn.freebsd.org/changeset/base/189954 Log: MFC r189567: For IP1001 PHYs, read auto-negotiation advertisement register to get default next page configuration. While I'm here explicitly set IP1000PHY_ANAR_CSMA bit. This bit is read-only and always set by hardware so setting it has no effect but it would clear the intention. With this change controllers that couldn't establish 1000baseT link should work. PR: kern/130846 Modified: stable/7/sys/ (props changed) stable/7/sys/contrib/pf/ (props changed) stable/7/sys/dev/ath/ath_hal/ (props changed) stable/7/sys/dev/cxgb/ (props changed) stable/7/sys/dev/mii/ip1000phy.c stable/7/sys/dev/mii/ip1000phyreg.h Modified: stable/7/sys/dev/mii/ip1000phy.c ============================================================================== --- stable/7/sys/dev/mii/ip1000phy.c Wed Mar 18 03:33:45 2009 (r189953) +++ stable/7/sys/dev/mii/ip1000phy.c Wed Mar 18 03:36:08 2009 (r189954) @@ -391,18 +391,24 @@ ip1000phy_status(struct mii_softc *sc) } static int -ip1000phy_mii_phy_auto(struct mii_softc *mii) +ip1000phy_mii_phy_auto(struct mii_softc *sc) { + struct ip1000phy_softc *isc; uint32_t reg; - PHY_WRITE(mii, IP1000PHY_MII_ANAR, - IP1000PHY_ANAR_10T | IP1000PHY_ANAR_10T_FDX | + isc = (struct ip1000phy_softc *)sc; + reg = 0; + if (isc->model == MII_MODEL_ICPLUS_IP1001) + reg = PHY_READ(sc, IP1000PHY_MII_ANAR); + reg |= IP1000PHY_ANAR_10T | IP1000PHY_ANAR_10T_FDX | IP1000PHY_ANAR_100TX | IP1000PHY_ANAR_100TX_FDX | - IP1000PHY_ANAR_PAUSE | IP1000PHY_ANAR_APAUSE); + IP1000PHY_ANAR_PAUSE | IP1000PHY_ANAR_APAUSE; + PHY_WRITE(sc, IP1000PHY_MII_ANAR, reg | IP1000PHY_ANAR_CSMA); + reg = IP1000PHY_1000CR_1000T | IP1000PHY_1000CR_1000T_FDX; reg |= IP1000PHY_1000CR_MASTER; - PHY_WRITE(mii, IP1000PHY_MII_1000CR, reg); - PHY_WRITE(mii, IP1000PHY_MII_BMCR, (IP1000PHY_BMCR_FDX | + PHY_WRITE(sc, IP1000PHY_MII_1000CR, reg); + PHY_WRITE(sc, IP1000PHY_MII_BMCR, (IP1000PHY_BMCR_FDX | IP1000PHY_BMCR_AUTOEN | IP1000PHY_BMCR_STARTNEG)); return (EJUSTRETURN); Modified: stable/7/sys/dev/mii/ip1000phyreg.h ============================================================================== --- stable/7/sys/dev/mii/ip1000phyreg.h Wed Mar 18 03:33:45 2009 (r189953) +++ stable/7/sys/dev/mii/ip1000phyreg.h Wed Mar 18 03:36:08 2009 (r189954) @@ -61,6 +61,7 @@ /* Autonegotiation advertisement register */ #define IP1000PHY_MII_ANAR 0x04 +#define IP1000PHY_ANAR_CSMA 0x0001 #define IP1000PHY_ANAR_10T 0x0020 #define IP1000PHY_ANAR_10T_FDX 0x0040 #define IP1000PHY_ANAR_100TX 0x0080