From owner-freebsd-current@FreeBSD.ORG Tue Jun 20 13:10:59 2006 Return-Path: X-Original-To: freebsd-current@freebsd.org Delivered-To: freebsd-current@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id C5C0C16A474; Tue, 20 Jun 2006 13:10:59 +0000 (UTC) (envelope-from avg@icyb.net.ua) Received: from citadel.icyb.net.ua (citadel.icyb.net.ua [212.40.38.140]) by mx1.FreeBSD.org (Postfix) with ESMTP id B36DF43D67; Tue, 20 Jun 2006 13:10:57 +0000 (GMT) (envelope-from avg@icyb.net.ua) Received: from [212.40.38.87] (oddity-e.topspin.kiev.ua [212.40.38.87]) by citadel.icyb.net.ua (8.8.8p3/ICyb-2.3exp) with ESMTP id QAA06611; Tue, 20 Jun 2006 16:10:54 +0300 (EEST) (envelope-from avg@icyb.net.ua) Message-ID: <4497F3DE.7030000@icyb.net.ua> Date: Tue, 20 Jun 2006 16:10:54 +0300 From: Andriy Gapon User-Agent: Thunderbird 1.5.0.4 (X11/20060615) MIME-Version: 1.0 To: John Baldwin References: <1148837064.00534930.1148826605@10.7.7.3> <200606011504.31635.jhb@freebsd.org> <44929864.4080207@icyb.net.ua> <200606161509.28998.jhb@freebsd.org> In-Reply-To: <200606161509.28998.jhb@freebsd.org> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: freebsd-current@freebsd.org, Nate Lawson Subject: Re: Freeze due to performance_cx_lowest=LOW X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 Jun 2006 13:10:59 -0000 on 16/06/2006 22:09 John Baldwin said the following: > On Friday 16 June 2006 07:39, Andriy Gapon wrote: >> Maybe I will say something too ignorant for this list, but is it >> possible to drive hardclock with two interrupts (I haven't thought yet >> how, though) and use RTC as the second interrupt source ? >> I think that RTC/IRQ8 (usually) doesn't have problems associated with >> 8254 timer/IRQ0 and can be used without mixed mode. > > Well, you could use the RTC instead of the lapic timer on CPU 0 and then use > IPIs to forward clock interrupts to all the other CPUs just as we did before > we used the lapic timer. > Well, I think MP systems are "meant" to use lapic timer; anyway, I do not care much for them now :-) But I am exploring possibilities to avoid using lapic timer (or to augment it) on UP systems. And, as you confirm, RTC seems to be a good candidate for that. -- Andriy Gapon