From owner-freebsd-threads@FreeBSD.ORG Fri Jul 18 16:45:55 2003 Return-Path: Delivered-To: freebsd-threads@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 3CB5837B401; Fri, 18 Jul 2003 16:45:55 -0700 (PDT) Received: from rwcrmhc12.comcast.net (rwcrmhc12.comcast.net [216.148.227.85]) by mx1.FreeBSD.org (Postfix) with ESMTP id B098643F3F; Fri, 18 Jul 2003 16:45:54 -0700 (PDT) (envelope-from julian@elischer.org) Received: from interjet.elischer.org ([12.233.125.100]) by attbi.com (rwcrmhc12) with ESMTP id <2003071823455401400s5vf1e>; Fri, 18 Jul 2003 23:45:54 +0000 Received: from localhost (localhost.elischer.org [127.0.0.1]) by InterJet.elischer.org (8.9.1a/8.9.1) with ESMTP id QAA16415; Fri, 18 Jul 2003 16:45:53 -0700 (PDT) Date: Fri, 18 Jul 2003 16:45:51 -0700 (PDT) From: Julian Elischer To: Marcel Moolenaar In-Reply-To: <20030718223119.GB35221@dhcp01.pn.xcllnt.net> Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII cc: deischen@freebsd.org cc: threads@freebsd.org Subject: Re: Rearranging kse mailbox X-BeenThere: freebsd-threads@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Threading on FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Jul 2003 23:45:55 -0000 On Fri, 18 Jul 2003, Marcel Moolenaar wrote: > On Fri, Jul 18, 2003 at 03:08:40PM -0700, Julian Elischer wrote: > > > > the ia64 requires that the thread pointer points to > > aome location that is 16 bytes long, the first 8 bytes > > of which is a pointer to the TLS Dynamic thread vector, and the 2nd 8 > > bytes is application specific, but in practice, must be a pointer to > > the Thread's or KSE's mailbox (I guess KSE to be similar to the others.) > > > > ia32 requires just that the thread control info pointed to by %gs > > SOMEWHERE contains a pointer to the dtv (where SOMEWHERE is a known > > offset). (In our case the offset would be 0) > > > > This means that for the UTS to find the active thread under ia64 > > takes an extra level of indirection. (node neither of these > > affect upcalls as teh UTS upcall target function has the mailbox as an > > argument and can access it independently of %gs or the tp. > > > > Am I right that "variant 2" (as seen in the ia32 case) > > applies to allarchitectures other than ia64? > > That is what I need to find out. If the runtime specification has > a register dedicated for TLS, like on ia64, it will likely behave > more like ia64 than ia32. I think the amd64 runtime is new enough > for it to be like ia64. > > Note that the extra level of indirection on ia64 can be avoided if > we put the thread control structure at a negative offset from TP. > The layout would be something like: > > -... 0 8 16 ...+ > [thread structure][DTV pointer][free][static TLS] > ^ > TP Looks that way (assuming no 'gotcha's' that make the size of the thread structure unpredicatable.) > > -- > Marcel Moolenaar USPA: A-39004 marcel@xcllnt.net >