From owner-svn-src-all@FreeBSD.ORG Sun Apr 26 16:37:28 2015 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id E6B93D12; Sun, 26 Apr 2015 16:37:28 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id D47CB1883; Sun, 26 Apr 2015 16:37:28 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t3QGbS6U026744; Sun, 26 Apr 2015 16:37:28 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t3QGbSjf026742; Sun, 26 Apr 2015 16:37:28 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201504261637.t3QGbSjf026742@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Sun, 26 Apr 2015 16:37:28 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r282025 - head/sys/arm/arm X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 26 Apr 2015 16:37:29 -0000 Author: andrew Date: Sun Apr 26 16:37:27 2015 New Revision: 282025 URL: https://svnweb.freebsd.org/changeset/base/282025 Log: Cleanup a little more: - Remove whitespace at the end of lines - Use a tab after instructions, not spaces Modified: head/sys/arm/arm/locore-v4.S head/sys/arm/arm/locore-v6.S Modified: head/sys/arm/arm/locore-v4.S ============================================================================== --- head/sys/arm/arm/locore-v4.S Sun Apr 26 16:18:41 2015 (r282024) +++ head/sys/arm/arm/locore-v4.S Sun Apr 26 16:37:27 2015 (r282025) @@ -116,7 +116,7 @@ ASENTRY_NP(_start) * If we're running with MMU disabled, test against the * physical address instead. */ - mrc p15, 0, r2, c1, c0, 0 + mrc p15, 0, r2, c1, c0, 0 ands r2, r2, #CPU_CONTROL_MMU_ENABLE ldreq r6, =PHYSADDR ldrne r6, =LOADERRAMADDR @@ -125,7 +125,7 @@ ASENTRY_NP(_start) cmp r7, pc bhi from_ram b do_copy - + flash_lower: cmp r6, pc bls from_ram @@ -148,12 +148,12 @@ from_ram: disable_mmu: /* Disable MMU for a while */ - mrc p15, 0, r2, c1, c0, 0 + mrc p15, 0, r2, c1, c0, 0 bic r2, r2, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE |\ CPU_CONTROL_WBUF_ENABLE) bic r2, r2, #(CPU_CONTROL_IC_ENABLE) bic r2, r2, #(CPU_CONTROL_BPRD_ENABLE) - mcr p15, 0, r2, c1, c0, 0 + mcr p15, 0, r2, c1, c0, 0 nop nop @@ -172,25 +172,25 @@ Lunmapped: /* * Some of the older ports (the various XScale, mostly) assume * that the memory before the kernel is mapped, and use it for - * the various stacks, page tables, etc. For those CPUs, map the - * 64 first MB of RAM, as it used to be. + * the various stacks, page tables, etc. For those CPUs, map the + * 64 first MB of RAM, as it used to be. */ /* * Map PA == VA - */ - ldr r5, =PHYSADDR - mov r1, r5 - mov r2, r5 + */ + ldr r5, =PHYSADDR + mov r1, r5 + mov r2, r5 /* Map 64MiB, preserved over calls to build_pagetables */ - mov r3, #64 - bl build_pagetables - + mov r3, #64 + bl build_pagetables + /* Create the kernel map to jump to */ - mov r1, r5 - ldr r2, =(KERNBASE) - bl build_pagetables + mov r1, r5 + ldr r2, =(KERNBASE) + bl build_pagetables ldr r5, =(KERNPHYSADDR) - + #if defined(SOCDEV_PA) && defined(SOCDEV_VA) /* Create the custom map */ ldr r1, =SOCDEV_PA @@ -202,9 +202,9 @@ Lunmapped: mcr p15, 0, r0, c8, c7, 0 /* Flush TLB */ /* Set the Domain Access register. Very important! */ - mov r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT) + mov r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT) mcr p15, 0, r0, c3, c0, 0 - /* + /* * Enable MMU. * On armv6 enable extended page tables, and set alignment checking * to modulo-4 (CPU_CONTROL_UNAL_ENABLE) for the ldrd/strd @@ -359,11 +359,11 @@ pagetable: .word _C_LABEL(cpufuncs) ENTRY_NP(cpu_halt) - mrs r2, cpsr + mrs r2, cpsr bic r2, r2, #(PSR_MODE) - orr r2, r2, #(PSR_SVC32_MODE) + orr r2, r2, #(PSR_SVC32_MODE) orr r2, r2, #(PSR_I | PSR_F) - msr cpsr_fsxc, r2 + msr cpsr_fsxc, r2 ldr r4, .Lcpu_reset_address ldr r4, [r4] @@ -389,9 +389,9 @@ ENTRY_NP(cpu_halt) * Hurl ourselves into the ROM */ mov r0, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE) - mcr p15, 0, r0, c1, c0, 0 - mcrne p15, 0, r2, c8, c7, 0 /* nail I+D TLB on ARMv4 and greater */ - mov pc, r4 + mcr p15, 0, r0, c1, c0, 0 + mcrne p15, 0, r2, c8, c7, 0 /* nail I+D TLB on ARMv4 and greater */ + mov pc, r4 /* * _cpu_reset_address contains the address to branch to, to complete Modified: head/sys/arm/arm/locore-v6.S ============================================================================== --- head/sys/arm/arm/locore-v6.S Sun Apr 26 16:18:41 2015 (r282024) +++ head/sys/arm/arm/locore-v6.S Sun Apr 26 16:37:27 2015 (r282025) @@ -39,7 +39,7 @@ __FBSDID("$FreeBSD$"); -#ifndef ARM_NEW_PMAP +#ifndef ARM_NEW_PMAP #define PTE1_OFFSET L1_S_OFFSET #define PTE1_SHIFT L1_S_SHIFT #define PTE1_SIZE L1_S_SIZE @@ -93,7 +93,7 @@ ASENTRY_NP(_start) * valid. Disable all caches and the MMU, and invalidate everything * before setting up new page tables and re-enabling the mmu. */ -1: +1: bic r7, #CPU_CONTROL_DC_ENABLE bic r7, #CPU_CONTROL_MMU_ENABLE bic r7, #CPU_CONTROL_IC_ENABLE @@ -422,7 +422,7 @@ ASENTRY_NP(mpentry) /* Find the delta between VA and PA */ adr r0, Lpagetable bl translate_va_to_pa - + bl init_mmu adr r1, .Lstart+8 /* Get initstack pointer from */ @@ -459,7 +459,7 @@ ENTRY_NP(cpu_halt) ldr r4, [r4] teq r4, #0 movne pc, r4 -1: +1: WFI b 1b