From owner-freebsd-questions Tue Jun 18 08:41:32 1996 Return-Path: owner-questions Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id IAA04389 for questions-outgoing; Tue, 18 Jun 1996 08:41:32 -0700 (PDT) Received: from portal.spi.net ([199.238.225.153]) by freefall.freebsd.org (8.7.5/8.7.3) with SMTP id IAA04381; Tue, 18 Jun 1996 08:41:28 -0700 (PDT) Received: from MindBender.HeadCandy.com (root@MindBender.HeadCandy.com [199.238.225.168]) by portal.spi.net (8.6.12/8.6.9) with ESMTP id IAA26614; Tue, 18 Jun 1996 08:41:18 -0700 Received: from localhost.HeadCandy.com (michaelv@localhost.HeadCandy.com [127.0.0.1]) by MindBender.HeadCandy.com (8.7.5/8.6.9) with SMTP id IAA16069; Tue, 18 Jun 1996 08:41:16 -0700 (PDT) Message-Id: <199606181541.IAA16069@MindBender.HeadCandy.com> X-Authentication-Warning: MindBender.HeadCandy.com: Host michaelv@localhost.HeadCandy.com [127.0.0.1] didn't use HELO protocol To: sos@freebsd.org cc: alex@fa.tdktca.com (Alex Nash), bmk@fta.com, Eloy.Paris@ven.ra.rockwell.com, questions@freebsd.org, hardware@freebsd.org, hal@wwa.com Subject: Re: FreeBSD works with Cy486DLC processors? In-reply-to: Your message of Tue, 18 Jun 96 13:45:57 +0200. <199606181145.NAA18166@ra.dkuug.dk> Date: Tue, 18 Jun 1996 08:41:15 -0700 From: "Michael L. VanLoon -- HeadCandy.com" Sender: owner-questions@freebsd.org X-Loop: FreeBSD.org Precedence: bulk >Hmm, just to add another datapoint: >I can run 2.1 on my 486DLC board, but -current will panic within >2 minutes with a page fault or semilar. I have a very strong >feeling that our Cyrix/486DLC support leaves much to be desired, >as I can make the system run better (not error free) if I disable >the Cyrix code in locore.s. It seems that using the BIOS defaults >(both caches on) runs alot better than what we are trying to do >to it..... Actually, you shouldn't touch that DLC-specific code unless 1) you know what it does, 2) you have a non-traditional motherboard that has a chance of actually working. I believe that code was taken from NetBSD. If not, then what I'm about to say has no relevance. If it is, then I originally wrote it. CYRIX_CACHE_WORKS turns on the DLC cache, but in a mode where it flushes whenever a bus hold signal is asserted. This is intended for DLCs in 386 motherboards. Generally it works well only when there are no busmaster devices (like a completely IDE system). CYRIX_CACHE_REALLY_WORKS turns on the cache in fully-enabled mode. This should ONLY be used on motherboards specifically designed for a DLC where the cache coherency circuitry is known to work. But where the BIOS doesn't set the cache properly. You should NOT enable either of these features if your BIOS already does the right thing. Basically the root problem is twofold: 1) the kernel has _no_ way to know what the right thing to do is, because it can't know how your motherboard is designed, so it needs help by you setting the right option, and 2) the 486DLC is sometimes expected to do an impossible task: running in a 386 motherboard that has absolutely no support for cache coherency. ----------------------------------------------------------------------------- Michael L. VanLoon michaelv@HeadCandy.com --< Free your mind and your machine -- NetBSD free un*x >-- NetBSD working ports: 386+PC, Mac 68k, Amiga, Atari 68k, HP300, Sun3, Sun4/4c/4m, DEC MIPS, DEC Alpha, PC532, VAX, MVME68k, arm32... NetBSD ports in progress: PICA, others... Roll your own Internet access -- Seattle People's Internet cooperative. If you're in the Seattle area, ask me how. -----------------------------------------------------------------------------