From owner-svn-src-head@FreeBSD.ORG Mon Dec 1 19:32:46 2008 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id AE1D8106564A; Mon, 1 Dec 2008 19:32:46 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from server.baldwin.cx (bigknife-pt.tunnel.tserv9.chi1.ipv6.he.net [IPv6:2001:470:1f10:75::2]) by mx1.freebsd.org (Postfix) with ESMTP id 3A1718FC2B; Mon, 1 Dec 2008 19:32:46 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from localhost.corp.yahoo.com (john@localhost [IPv6:::1]) (authenticated bits=0) by server.baldwin.cx (8.14.3/8.14.3) with ESMTP id mB1JW7SY099801; Mon, 1 Dec 2008 14:32:39 -0500 (EST) (envelope-from jhb@freebsd.org) From: John Baldwin To: Kostik Belousov Date: Mon, 1 Dec 2008 14:07:06 -0500 User-Agent: KMail/1.9.7 References: <200811220555.mAM5tuIJ007781@svn.freebsd.org> <3c1674c90811221651u338294frcdbd99b386733851@mail.gmail.com> <20081123154138.GS6408@deviant.kiev.zoral.com.ua> In-Reply-To: <20081123154138.GS6408@deviant.kiev.zoral.com.ua> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-15" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200812011407.06563.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH authentication, not delayed by milter-greylist-2.0.2 (server.baldwin.cx [IPv6:::1]); Mon, 01 Dec 2008 14:32:40 -0500 (EST) X-Virus-Scanned: ClamAV 0.93.1/8704/Mon Dec 1 11:39:36 2008 on server.baldwin.cx X-Virus-Status: Clean X-Spam-Status: No, score=-2.6 required=4.2 tests=AWL,BAYES_00,NO_RELAYS autolearn=ham version=3.1.3 X-Spam-Checker-Version: SpamAssassin 3.1.3 (2006-06-01) on server.baldwin.cx Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org, Scott Long , src-committers@freebsd.org, Kip Macy Subject: Re: svn commit: r185162 - in head: . sys/amd64/include sys/arm/include sys/conf sys/dev/bce sys/dev/cxgb sys/dev/cxgb/sys sys/dev/cxgb/ulp/iw_cxgb sys/dev/mxge sys/dev/nxge sys/i386/include sys/i386/in... X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Dec 2008 19:32:47 -0000 On Sunday 23 November 2008 10:41:38 am Kostik Belousov wrote: > On Sun, Nov 23, 2008 at 12:51:58AM +0000, Kip Macy wrote: > > On Sat, Nov 22, 2008 at 11:08 PM, Scott Long wrote: > > > Kostik Belousov wrote: > > >> > > >> On Sat, Nov 22, 2008 at 03:05:22PM -0700, Scott Long wrote: > > >>> > > >>> A neat hack would be for the kernel linker to scan the text and do a > > >>> drop-in replacement of the opcode that is appropriate for the platform. > > >>> I can't see how a CPU_XXX definition would work because it's just a > > >>> compile time construct, one that can be included with any kernel > > >>> compile. > > >> > > >> Yes, it is possible to do that. Less drastic change is to directly > > >> check features. I moved slow code to separate section to eliminate > > >> unconditional jump in fast path. > > >> Only compile-tested. > > >> > > > > > > As long as it works, I think it's a step in the right direction; I'm > > > assuming that cpu_feature is a symbol filled in at runtime and not a > > > macro for the cpuid instruction, right? > > > > > > Scott > > > > > > > i386/include/md_var.h: > > <..> > > extern u_int cpu_exthigh; > > extern u_int cpu_feature; > > extern u_int cpu_feature2; > > extern u_int amd_feature; > > extern u_int amd_feature2; > > <...> > > > > I'm not thrilled with it, but we can revisit the issue if it makes a > > measurable difference on someone's workload. > > Below is the updated patch. It includes changes made after private comments > by bde@ and uses symbolic definitions for the bits in the features words. > I thought about accessing a per-CPU word for serialized instruction in the > slow path, but decided that it does not beneficial.\ Is the branch really better than just doing what the atomic operations for mutexes, etc. do and just use 'lock addl $0,%esp' for a barrier in all cases on i386 and only bother with using the fancier instructions on amd64? Even amd64 doesn't use *fence yet for the atomic ops actually. I have had a patch to use it for years, but during testing there was no discernable difference between the existing 'lock addl' approach vs '*fence'. I'd much rather just use 486 code for all i386 machines than add a branch, esp. if the "optimization" the branch is doing isn't an actual optimization. -- John Baldwin