From owner-svn-src-all@freebsd.org Sat Oct 19 01:07:36 2019 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id C6CD315E93A; Sat, 19 Oct 2019 01:07:36 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 46w4WX4rkxz4DVm; Sat, 19 Oct 2019 01:07:36 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 8537919918; Sat, 19 Oct 2019 01:07:36 +0000 (UTC) (envelope-from jhibbits@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x9J17aAA040719; Sat, 19 Oct 2019 01:07:36 GMT (envelope-from jhibbits@FreeBSD.org) Received: (from jhibbits@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x9J17aRQ040718; Sat, 19 Oct 2019 01:07:36 GMT (envelope-from jhibbits@FreeBSD.org) Message-Id: <201910190107.x9J17aRQ040718@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jhibbits set sender to jhibbits@FreeBSD.org using -f From: Justin Hibbits Date: Sat, 19 Oct 2019 01:07:36 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r353745 - head/sys/powerpc/mpc85xx X-SVN-Group: head X-SVN-Commit-Author: jhibbits X-SVN-Commit-Paths: head/sys/powerpc/mpc85xx X-SVN-Commit-Revision: 353745 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Oct 2019 01:07:36 -0000 Author: jhibbits Date: Sat Oct 19 01:07:35 2019 New Revision: 353745 URL: https://svnweb.freebsd.org/changeset/base/353745 Log: powerpc/mpc85xx: Replace global PCI config mutex with per-controller mutex PCI controllers need to enforce exclusive config register access on their own bus, not between all buses. Modified: head/sys/powerpc/mpc85xx/pci_mpc85xx.c Modified: head/sys/powerpc/mpc85xx/pci_mpc85xx.c ============================================================================== --- head/sys/powerpc/mpc85xx/pci_mpc85xx.c Fri Oct 18 22:53:40 2019 (r353744) +++ head/sys/powerpc/mpc85xx/pci_mpc85xx.c Sat Oct 19 01:07:35 2019 (r353745) @@ -126,6 +126,7 @@ __FBSDID("$FreeBSD$"); struct fsl_pcib_softc { struct ofw_pci_softc pci_sc; device_t sc_dev; + struct mtx sc_cfg_mtx; int sc_iomem_target; bus_addr_t sc_iomem_start, sc_iomem_end; @@ -200,10 +201,6 @@ static uint32_t fsl_pcib_read_config(device_t, u_int, static void fsl_pcib_write_config(device_t, u_int, u_int, u_int, u_int, uint32_t, int); -/* Configuration r/w mutex. */ -struct mtx pcicfg_mtx; -static int mtx_initialized = 0; - /* * Bus interface definitions. */ @@ -298,10 +295,7 @@ fsl_pcib_attach(device_t dev) sc->sc_bsh = rman_get_bushandle(sc->sc_res); sc->sc_busnr = 0; - if (!mtx_initialized) { - mtx_init(&pcicfg_mtx, "pcicfg", NULL, MTX_SPIN); - mtx_initialized = 1; - } + mtx_init(&sc->sc_cfg_mtx, "pcicfg", NULL, MTX_SPIN); cfgreg = fsl_pcib_cfgread(sc, 0, 0, 0, PCIR_VENDOR, 2); if (cfgreg != 0x1057 && cfgreg != 0x1957) @@ -413,7 +407,7 @@ fsl_pcib_cfgread(struct fsl_pcib_softc *sc, u_int bus, if (sc->sc_pcie) addr |= (reg & 0xf00) << 16; - mtx_lock_spin(&pcicfg_mtx); + mtx_lock_spin(&sc->sc_cfg_mtx); bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_CFG_ADDR, addr); switch (bytes) { @@ -433,7 +427,7 @@ fsl_pcib_cfgread(struct fsl_pcib_softc *sc, u_int bus, data = ~0; break; } - mtx_unlock_spin(&pcicfg_mtx); + mtx_unlock_spin(&sc->sc_cfg_mtx); return (data); } @@ -451,7 +445,7 @@ fsl_pcib_cfgwrite(struct fsl_pcib_softc *sc, u_int bus if (sc->sc_pcie) addr |= (reg & 0xf00) << 16; - mtx_lock_spin(&pcicfg_mtx); + mtx_lock_spin(&sc->sc_cfg_mtx); bus_space_write_4(sc->sc_bst, sc->sc_bsh, REG_CFG_ADDR, addr); switch (bytes) { @@ -468,7 +462,7 @@ fsl_pcib_cfgwrite(struct fsl_pcib_softc *sc, u_int bus REG_CFG_DATA, htole32(data)); break; } - mtx_unlock_spin(&pcicfg_mtx); + mtx_unlock_spin(&sc->sc_cfg_mtx); } #if 0 @@ -757,11 +751,12 @@ fsl_pcib_err_init(device_t dev) static int fsl_pcib_detach(device_t dev) { + struct fsl_pcib_softc *sc; - if (mtx_initialized) { - mtx_destroy(&pcicfg_mtx); - mtx_initialized = 0; - } + sc = device_get_softc(dev); + + mtx_destroy(&sc->sc_cfg_mtx); + return (bus_generic_detach(dev)); }