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Date: Mon, 25 Oct 2021 12:47:44 GMT
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To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org,
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From: Mark Johnston <markj@FreeBSD.org>
Subject: git: 6341e6af62b3 - stable/13 - x86: Remove some leftover APM support
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The branch stable/13 has been updated by markj:

URL: https://cgit.FreeBSD.org/src/commit/?id=6341e6af62b3453aa87afe7679417cc5606bfccc

commit 6341e6af62b3453aa87afe7679417cc5606bfccc
Author:     Mark Johnston <markj@FreeBSD.org>
AuthorDate: 2021-10-16 13:46:43 +0000
Commit:     Mark Johnston <markj@FreeBSD.org>
CommitDate: 2021-10-25 12:46:19 +0000

    x86: Remove some leftover APM support
    
    This is obsolete since commit 8c576a279ed5 ("Remove APM BIOS support").
    
    Reviewed by:    imp, kib
    Sponsored by:   The FreeBSD Foundation
    
    (cherry picked from commit 06ebadc5f555fd7fa6f869af1e5daf834b1bb04e)
---
 sys/x86/x86/tsc.c | 19 -------------------
 1 file changed, 19 deletions(-)

diff --git a/sys/x86/x86/tsc.c b/sys/x86/x86/tsc.c
index 0ebcea895cd3..fabc980e2231 100644
--- a/sys/x86/x86/tsc.c
+++ b/sys/x86/x86/tsc.c
@@ -42,7 +42,6 @@ __FBSDID("$FreeBSD$");
 #include <sys/time.h>
 #include <sys/timetc.h>
 #include <sys/kernel.h>
-#include <sys/power.h>
 #include <sys/smp.h>
 #include <sys/vdso.h>
 #include <machine/clock.h>
@@ -583,23 +582,6 @@ init_TSC_tc(void)
 	 */
 	max_freq = UINT_MAX;
 
-	/*
-	 * We can not use the TSC if we support APM.  Precise timekeeping
-	 * on an APM'ed machine is at best a fools pursuit, since 
-	 * any and all of the time spent in various SMM code can't 
-	 * be reliably accounted for.  Reading the RTC is your only
-	 * source of reliable time info.  The i8254 loses too, of course,
-	 * but we need to have some kind of time...
-	 * We don't know at this point whether APM is going to be used
-	 * or not, nor when it might be activated.  Play it safe.
-	 */
-	if (power_pm_get_type() == POWER_PM_TYPE_APM) {
-		tsc_timecounter.tc_quality = -1000;
-		if (bootverbose)
-			printf("TSC timecounter disabled: APM enabled.\n");
-		goto init;
-	}
-
 	/*
 	 * Intel CPUs without a C-state invariant TSC can stop the TSC
 	 * in either C2 or C3.  Disable use of C2 and C3 while using
@@ -635,7 +617,6 @@ init_TSC_tc(void)
 		tsc_timecounter.tc_quality = 1000;
 	max_freq >>= tsc_shift;
 
-init:
 	for (shift = 0; shift <= 31 && (tsc_freq >> shift) > max_freq; shift++)
 		;