Date: Tue, 22 Dec 2009 20:57:30 +0000 (UTC) From: Pyun YongHyeon <yongari@FreeBSD.org> To: cvs-src-old@freebsd.org Subject: cvs commit: src/sys/dev/ste if_ste.c Message-ID: <200912222057.nBMKvlRN079436@repoman.freebsd.org>
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yongari 2009-12-22 20:57:30 UTC
FreeBSD src repository
Modified files:
sys/dev/ste if_ste.c
Log:
SVN rev 200873 on 2009-12-22 20:57:30Z by yongari
Instead of relying on hard resetting of controller to stop
receiving incoming traffics, try harder to gracefully stop active
DMA cycles and then stop MACs. This is the way what datasheet
recommends and seems to work reliably. Resetting controller while
active DMAs are in progress is bad thing as we can't predict how
DMAs touche allocated TX/RX buffers. This change ensures controller
stop state before attempting to release allocated TX/RX buffers.
Also update MAC statistics which could have been updated during the
wait time of MAC stop.
While I'm here remove unnecessary controller resets in various
location. ste(4) no longer relies on hard controller reset to stop
controller and resetting controller also clears all configured
settings which makes it hard to implement WOL in near future.
Now resetting a controller is performed in ste_init_locked().
Revision Changes Path
1.15 +31 -20 src/sys/dev/ste/if_ste.c
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