From owner-svn-src-head@freebsd.org Sun Jan 15 06:35:01 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id C30B8CB13EF; Sun, 15 Jan 2017 06:35:01 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 926C0122E; Sun, 15 Jan 2017 06:35:01 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v0F6Z04x001636; Sun, 15 Jan 2017 06:35:00 GMT (envelope-from adrian@FreeBSD.org) Received: (from adrian@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v0F6Z0tF001634; Sun, 15 Jan 2017 06:35:00 GMT (envelope-from adrian@FreeBSD.org) Message-Id: <201701150635.v0F6Z0tF001634@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: adrian set sender to adrian@FreeBSD.org using -f From: Adrian Chadd Date: Sun, 15 Jan 2017 06:35:00 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r312211 - head/sys/mips/atheros X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 15 Jan 2017 06:35:01 -0000 Author: adrian Date: Sun Jan 15 06:35:00 2017 New Revision: 312211 URL: https://svnweb.freebsd.org/changeset/base/312211 Log: [ar71xx] add EARLY_PRINTF support for the rest of the non-AR933x SoCs. Tested: * AR934x SoC Modified: head/sys/mips/atheros/ar71xxreg.h head/sys/mips/atheros/uart_bus_ar71xx.c Modified: head/sys/mips/atheros/ar71xxreg.h ============================================================================== --- head/sys/mips/atheros/ar71xxreg.h Sun Jan 15 04:23:20 2017 (r312210) +++ head/sys/mips/atheros/ar71xxreg.h Sun Jan 15 06:35:00 2017 (r312211) @@ -111,6 +111,10 @@ #define PCI_WINDOW7_CONF_ADDR 0x07000000 #define AR71XX_UART_ADDR 0x18020000 +#define AR71XX_UART_THR 0x0 +#define AR71XX_UART_LSR 0x14 +#define AR71XX_UART_LSR_THRE (1 << 5) +#define AR71XX_UART_LSR_TEMT (1 << 6) #define AR71XX_USB_CTRL_FLADJ 0x18030000 #define USB_CTRL_FLADJ_HOST_SHIFT 12 Modified: head/sys/mips/atheros/uart_bus_ar71xx.c ============================================================================== --- head/sys/mips/atheros/uart_bus_ar71xx.c Sun Jan 15 04:23:20 2017 (r312210) +++ head/sys/mips/atheros/uart_bus_ar71xx.c Sun Jan 15 06:35:00 2017 (r312211) @@ -86,4 +86,21 @@ uart_ar71xx_probe(device_t dev) return (uart_bus_probe(dev, 2, freq, 0, 0)); } +#ifdef EARLY_PRINTF +static void +ar71xx_early_putc(int c) +{ + int i; + + for (i = 0; i < 1000; i++) { + if (ATH_READ_REG(AR71XX_UART_ADDR + AR71XX_UART_LSR) + & AR71XX_UART_LSR_THRE) + break; + } + + ATH_WRITE_REG(AR71XX_UART_ADDR + AR71XX_UART_THR, (c & 0xff)); +} +early_putc_t *early_putc = ar71xx_early_putc; +#endif + DRIVER_MODULE(uart, apb, uart_ar71xx_driver, uart_devclass, 0, 0);