Date: Fri, 10 Jun 2022 14:20:13 +0000 From: bugzilla-noreply@freebsd.org To: toolchain@FreeBSD.org Subject: [Bug 264590] assembler generates wrong opcodes of instructions fdiv fdivp fdivr fdivrp fsub fsubp fsubr fsubrp Message-ID: <bug-264590-29464-r3yNpQdDEZ@https.bugs.freebsd.org/bugzilla/> In-Reply-To: <bug-264590-29464@https.bugs.freebsd.org/bugzilla/> References: <bug-264590-29464@https.bugs.freebsd.org/bugzilla/>
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https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D264590 Mark Millard <marklmi26-fbsd@yahoo.com> changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |marklmi26-fbsd@yahoo.com --- Comment #7 from Mark Millard <marklmi26-fbsd@yahoo.com> --- Very old issue. See, for example: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D30117 Part of that has some history on the issue: Andrew Pinski 2006-12-07 22:40:52 UTC This is at most a GNU binutils bug. Please file it with them at http://sourceware.org/bugzilla/ . Also IIRC fdivp's arguments are swapped in AT&T asm mode because of some historical accident. See the comment in i386.c: /* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived assemblers, confusingly reverse the direction of the operation for fsub{r} and fdiv{r} when the destination register is not st(0). The Intel assembler doesn't have this brain damage. Read !SYSV386_COMPAT to figure out what the hardware really does. */ Also: #ifndef SYSV386_COMPAT /* Set to 1 for compatibility with brain-damaged assemblers. No-one wants to fix the assemblers because that causes incompatibility with gcc. No-one wants to fix gcc because that causes incompatibility with assemblers... You can use the option of -DSYSV386_COMPAT=3D0 if you recompile both gcc and gas this way. */ #define SYSV386_COMPAT 1 #endif --=20 You are receiving this mail because: You are the assignee for the bug.=
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