From owner-svn-src-all@FreeBSD.ORG Mon Jul 13 22:13:14 2009 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 10E551065673; Mon, 13 Jul 2009 22:13:14 +0000 (UTC) (envelope-from jkim@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id F024C8FC18; Mon, 13 Jul 2009 22:13:13 +0000 (UTC) (envelope-from jkim@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n6DMDDst037165; Mon, 13 Jul 2009 22:13:13 GMT (envelope-from jkim@svn.freebsd.org) Received: (from jkim@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n6DMDDWb037150; Mon, 13 Jul 2009 22:13:13 GMT (envelope-from jkim@svn.freebsd.org) Message-Id: <200907132213.n6DMDDWb037150@svn.freebsd.org> From: Jung-uk Kim Date: Mon, 13 Jul 2009 22:13:13 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-7@freebsd.org X-SVN-Group: stable-7 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r195667 - in stable/7/sys: . amd64/amd64 amd64/include boot/i386/libi386 compat/linprocfs conf contrib/pf i386/cpufreq i386/i386 modules/agp pci X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 13 Jul 2009 22:13:14 -0000 Author: jkim Date: Mon Jul 13 22:13:13 2009 New Revision: 195667 URL: http://svn.freebsd.org/changeset/base/195667 Log: MFC: Replace remaining cpu_vendor with cpu_vendor_id and add basic VIA Nano processor support for amd64 and i386. r186797 - Add Centaur/IDT/VIA vendor ID for Nano family. r187101 - Allow VIA Nano processors to boot FreeBSD/amd64. r187117 - Replace more cpu_vendor with cpu_vendor_id. r187118 - Add basic i386 support for VIA Nano processors. r187157 - Enable MSI support for VIA Nano processors on i386. r187594 - Replace more cpu_vendor with cpu_vendor_id. r187597 - Include a missing header file. r187598 - VIA Nano processor has P-state invariant TSC. r187633 - Add more VIA bridges to agp_via.c. Modified: stable/7/sys/ (props changed) stable/7/sys/amd64/amd64/identcpu.c stable/7/sys/amd64/include/cputypes.h stable/7/sys/amd64/include/specialreg.h stable/7/sys/boot/i386/libi386/bootinfo64.c stable/7/sys/compat/linprocfs/linprocfs.c stable/7/sys/conf/files.amd64 stable/7/sys/contrib/pf/ (props changed) stable/7/sys/i386/cpufreq/est.c stable/7/sys/i386/cpufreq/smist.c stable/7/sys/i386/i386/i686_mem.c stable/7/sys/i386/i386/identcpu.c stable/7/sys/i386/i386/initcpu.c stable/7/sys/i386/i386/msi.c stable/7/sys/modules/agp/Makefile stable/7/sys/pci/agp_via.c Modified: stable/7/sys/amd64/amd64/identcpu.c ============================================================================== --- stable/7/sys/amd64/amd64/identcpu.c Mon Jul 13 21:36:31 2009 (r195666) +++ stable/7/sys/amd64/amd64/identcpu.c Mon Jul 13 22:13:13 2009 (r195667) @@ -102,6 +102,7 @@ static struct { } cpu_vendors[] = { { INTEL_VENDOR_ID, CPU_VENDOR_INTEL }, /* GenuineIntel */ { AMD_VENDOR_ID, CPU_VENDOR_AMD }, /* AuthenticAMD */ + { CENTAUR_VENDOR_ID, CPU_VENDOR_CENTAUR }, /* CentaurHauls */ }; void @@ -368,6 +369,12 @@ printcpuinfo(void) AMD64_CPU_MODEL(cpu_id) >= 0x3)) tsc_is_invariant = 1; break; + case CPU_VENDOR_CENTAUR: + if (AMD64_CPU_FAMILY(cpu_id) == 0x6 && + AMD64_CPU_MODEL(cpu_id) >= 0xf && + (rdmsr(0x1203) & 0x100000000ULL) == 0) + tsc_is_invariant = 1; + break; } if (tsc_is_invariant) printf("\n TSC: P-state invariant"); Modified: stable/7/sys/amd64/include/cputypes.h ============================================================================== --- stable/7/sys/amd64/include/cputypes.h Mon Jul 13 21:36:31 2009 (r195666) +++ stable/7/sys/amd64/include/cputypes.h Mon Jul 13 22:13:13 2009 (r195667) @@ -47,7 +47,9 @@ * Vendors of processor. */ #define CPU_VENDOR_AMD 0x1022 /* AMD */ +#define CPU_VENDOR_IDT 0x111d /* Centaur/IDT/VIA */ #define CPU_VENDOR_INTEL 0x8086 /* Intel */ +#define CPU_VENDOR_CENTAUR CPU_VENDOR_IDT #ifndef LOCORE extern int cpu; Modified: stable/7/sys/amd64/include/specialreg.h ============================================================================== --- stable/7/sys/amd64/include/specialreg.h Mon Jul 13 21:36:31 2009 (r195666) +++ stable/7/sys/amd64/include/specialreg.h Mon Jul 13 22:13:13 2009 (r195667) @@ -205,6 +205,7 @@ * CPUID manufacturers identifiers */ #define AMD_VENDOR_ID "AuthenticAMD" +#define CENTAUR_VENDOR_ID "CentaurHauls" #define INTEL_VENDOR_ID "GenuineIntel" /* Modified: stable/7/sys/boot/i386/libi386/bootinfo64.c ============================================================================== --- stable/7/sys/boot/i386/libi386/bootinfo64.c Mon Jul 13 21:36:31 2009 (r195666) +++ stable/7/sys/boot/i386/libi386/bootinfo64.c Mon Jul 13 22:13:13 2009 (r195667) @@ -150,8 +150,9 @@ bi_checkcpu(void) cpu_vendor = (char *)vendor; /* Check for vendors that support AMD features. */ - if (strncmp(cpu_vendor, "GenuineIntel", 12) != 0 && - strncmp(cpu_vendor, "AuthenticAMD", 12) != 0) + if (strncmp(cpu_vendor, INTEL_VENDOR_ID, 12) != 0 && + strncmp(cpu_vendor, AMD_VENDOR_ID, 12) != 0 && + strncmp(cpu_vendor, CENTAUR_VENDOR_ID, 12) != 0) return (0); /* Has to support AMD features. */ Modified: stable/7/sys/compat/linprocfs/linprocfs.c ============================================================================== --- stable/7/sys/compat/linprocfs/linprocfs.c Mon Jul 13 21:36:31 2009 (r195666) +++ stable/7/sys/compat/linprocfs/linprocfs.c Mon Jul 13 22:13:13 2009 (r195667) @@ -273,11 +273,17 @@ linprocfs_docpuinfo(PFS_FILL_ARGS) sbuf_cat(sb, "flags\t\t:"); - if (!strcmp(cpu_vendor, "AuthenticAMD") && (class < 6)) { - flags[16] = "fcmov"; - } else if (!strcmp(cpu_vendor, "CyrixInstead")) { +#ifdef __i386__ + switch (cpu_vendor_id) { + case CPU_VENDOR_AMD: + if (class < 6) + flags[16] = "fcmov"; + break; + case CPU_VENDOR_CYRIX: flags[24] = "cxmmx"; + break; } +#endif for (i = 0; i < 32; i++) if (cpu_feature & (1 << i)) Modified: stable/7/sys/conf/files.amd64 ============================================================================== --- stable/7/sys/conf/files.amd64 Mon Jul 13 21:36:31 2009 (r195666) +++ stable/7/sys/conf/files.amd64 Mon Jul 13 22:13:13 2009 (r195667) @@ -205,6 +205,7 @@ kern/link_elf_obj.c standard pci/agp_amd64.c optional agp pci/agp_i810.c optional agp pci/agp_intel.c optional agp +pci/agp_via.c optional agp # # IA32 binary support # Modified: stable/7/sys/i386/cpufreq/est.c ============================================================================== --- stable/7/sys/i386/cpufreq/est.c Mon Jul 13 21:36:31 2009 (r195666) +++ stable/7/sys/i386/cpufreq/est.c Mon Jul 13 22:13:13 2009 (r195667) @@ -55,10 +55,6 @@ __FBSDID("$FreeBSD$"); #define MSR_MISC_ENABLE 0x1a0 #define MSR_SS_ENABLE (1<<16) -#ifndef CPU_VENDOR_CENTAUR -#define CPU_VENDOR_CENTAUR 0x111d -#endif - /* Frequency and MSR control values. */ typedef struct { uint16_t freq; Modified: stable/7/sys/i386/cpufreq/smist.c ============================================================================== --- stable/7/sys/i386/cpufreq/smist.c Mon Jul 13 21:36:31 2009 (r195666) +++ stable/7/sys/i386/cpufreq/smist.c Mon Jul 13 22:13:13 2009 (r195667) @@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include @@ -285,7 +286,7 @@ smist_identify(driver_t *driver, device_ return; /* Check for a supported processor */ - if (strcmp(cpu_vendor, "GenuineIntel") != 0) + if (cpu_vendor_id != CPU_VENDOR_INTEL) return; switch (cpu_id & 0xff0) { case 0x680: /* Pentium III [coppermine] */ Modified: stable/7/sys/i386/i386/i686_mem.c ============================================================================== --- stable/7/sys/i386/i386/i686_mem.c Mon Jul 13 21:36:31 2009 (r195666) +++ stable/7/sys/i386/i386/i686_mem.c Mon Jul 13 22:13:13 2009 (r195667) @@ -678,9 +678,17 @@ i686_mem_drvinit(void *unused) return; if ((cpu_id & 0xf00) != 0x600 && (cpu_id & 0xf00) != 0xf00) return; - if (cpu_vendor_id != CPU_VENDOR_INTEL && - cpu_vendor_id != CPU_VENDOR_AMD) + switch (cpu_vendor_id) { + case CPU_VENDOR_INTEL: + case CPU_VENDOR_AMD: + break; + case CPU_VENDOR_CENTAUR: + if (cpu_exthigh >= 0x80000008) + break; + /* FALLTHROUGH */ + default: return; + } mem_range_softc.mr_op = &i686_mrops; } SYSINIT(i686memdev, SI_SUB_DRIVERS, SI_ORDER_FIRST, i686_mem_drvinit, NULL); Modified: stable/7/sys/i386/i386/identcpu.c ============================================================================== --- stable/7/sys/i386/i386/identcpu.c Mon Jul 13 21:36:31 2009 (r195666) +++ stable/7/sys/i386/i386/identcpu.c Mon Jul 13 22:13:13 2009 (r195667) @@ -603,6 +603,9 @@ printcpuinfo(void) case 0x6d0: strcpy(cpu_model, "VIA C7 Esther"); break; + case 0x6f0: + strcpy(cpu_model, "VIA Nano"); + break; default: strcpy(cpu_model, "VIA/IDT Unknown"); } @@ -853,6 +856,9 @@ printcpuinfo(void) ); } + if (cpu_vendor_id == CPU_VENDOR_CENTAUR) + print_via_padlock_info(); + if ((cpu_feature & CPUID_HTT) && cpu_vendor_id == CPU_VENDOR_AMD) cpu_feature &= ~CPUID_HTT; @@ -872,6 +878,12 @@ printcpuinfo(void) if (amd_pminfo & AMDPM_TSC_INVARIANT) tsc_is_invariant = 1; break; + case CPU_VENDOR_CENTAUR: + if (I386_CPU_FAMILY(cpu_id) == 0x6 && + I386_CPU_MODEL(cpu_id) >= 0xf && + (rdmsr(0x1203) & 0x100000000ULL) == 0) + tsc_is_invariant = 1; + break; } if (tsc_is_invariant) printf("\n TSC: P-state invariant"); @@ -906,8 +918,6 @@ printcpuinfo(void) printf("\n CPU cache: write-through mode"); #endif } - if (cpu_vendor_id == CPU_VENDOR_CENTAUR) - print_via_padlock_info(); /* Avoid ugly blank lines: only print newline when we have to. */ if (*cpu_vendor || cpu_id) @@ -1559,6 +1569,7 @@ print_via_padlock_info(void) return; case 0x6a0: case 0x6d0: + case 0x6f0: break; default: return; Modified: stable/7/sys/i386/i386/initcpu.c ============================================================================== --- stable/7/sys/i386/i386/initcpu.c Mon Jul 13 21:36:31 2009 (r195666) +++ stable/7/sys/i386/i386/initcpu.c Mon Jul 13 22:13:13 2009 (r195667) @@ -650,7 +650,7 @@ initializecpu(void) init_6x86MX(); break; case CPU_686: - if (strcmp(cpu_vendor, "GenuineIntel") == 0) { + if (cpu_vendor_id == CPU_VENDOR_INTEL) { switch (cpu_id & 0xff0) { case 0x610: init_ppro(); @@ -659,7 +659,7 @@ initializecpu(void) init_mendocino(); break; } - } else if (strcmp(cpu_vendor, "AuthenticAMD") == 0) { + } else if (cpu_vendor_id == CPU_VENDOR_AMD) { #if defined(I686_CPU) && defined(CPU_ATHLON_SSE_HACK) /* * Sometimes the BIOS doesn't enable SSE instructions. @@ -678,7 +678,7 @@ initializecpu(void) cpu_feature = regs[3]; } #endif - } else if (strcmp(cpu_vendor, "CentaurHauls") == 0) { + } else if (cpu_vendor_id == CPU_VENDOR_CENTAUR) { switch (cpu_id & 0xff0) { case 0x690: if ((cpu_id & 0xf) < 3) @@ -686,6 +686,7 @@ initializecpu(void) /* fall through. */ case 0x6a0: case 0x6d0: + case 0x6f0: init_via(); break; default: @@ -718,7 +719,7 @@ initializecpu(void) * CPU_UPGRADE_HW_CACHE option in your kernel configuration file. * This option eliminates unneeded cache flush instruction(s). */ - if (strcmp(cpu_vendor, "CyrixInstead") == 0) { + if (cpu_vendor_id == CPU_VENDOR_CYRIX) { switch (cpu) { #ifdef I486_CPU case CPU_486DLC: @@ -737,7 +738,7 @@ initializecpu(void) default: break; } - } else if (strcmp(cpu_vendor, "AuthenticAMD") == 0) { + } else if (cpu_vendor_id == CPU_VENDOR_AMD) { switch (cpu_id & 0xFF0) { case 0x470: /* Enhanced Am486DX2 WB */ case 0x490: /* Enhanced Am486DX4 WB */ @@ -745,7 +746,7 @@ initializecpu(void) need_pre_dma_flush = 1; break; } - } else if (strcmp(cpu_vendor, "IBM") == 0) { + } else if (cpu_vendor_id == CPU_VENDOR_IBM) { need_post_dma_flush = 1; } else { #ifdef CPU_I486_ON_386 @@ -941,7 +942,7 @@ DB_SHOW_COMMAND(cyrixreg, cyrixreg) u_char ccr0 = 0, ccr4 = 0, ccr5 = 0, pcr0 = 0; cr0 = rcr0(); - if (strcmp(cpu_vendor,"CyrixInstead") == 0) { + if (cpu_vendor_id == CPU_VENDOR_CYRIX) { eflags = read_eflags(); disable_intr(); Modified: stable/7/sys/i386/i386/msi.c ============================================================================== --- stable/7/sys/i386/i386/msi.c Mon Jul 13 21:36:31 2009 (r195666) +++ stable/7/sys/i386/i386/msi.c Mon Jul 13 22:13:13 2009 (r195667) @@ -51,6 +51,7 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include #include /* Fields in address for Intel MSI messages. */ @@ -212,9 +213,18 @@ msi_init(void) { /* Check if we have a supported CPU. */ - if (!(cpu_vendor_id == CPU_VENDOR_INTEL || - cpu_vendor_id == CPU_VENDOR_AMD)) + switch (cpu_vendor_id) { + case CPU_VENDOR_INTEL: + case CPU_VENDOR_AMD: + break; + case CPU_VENDOR_CENTAUR: + if (I386_CPU_FAMILY(cpu_id) == 0x6 && + I386_CPU_MODEL(cpu_id) >= 0xf) + break; + /* FALLTHROUGH */ + default: return; + } msi_enabled = 1; intr_register_pic(&msi_pic); Modified: stable/7/sys/modules/agp/Makefile ============================================================================== --- stable/7/sys/modules/agp/Makefile Mon Jul 13 21:36:31 2009 (r195666) +++ stable/7/sys/modules/agp/Makefile Mon Jul 13 22:13:13 2009 (r195667) @@ -12,7 +12,7 @@ SRCS+= agp_i810.c agp_intel.c agp_via.c SRCS+= agp_amd64.c .endif .if ${MACHINE_ARCH} == "amd64" -SRCS+= agp_amd64.c agp_i810.c +SRCS+= agp_amd64.c agp_i810.c agp_via.c .endif SRCS+= device_if.h bus_if.h agp_if.h pci_if.h SRCS+= opt_bus.h Modified: stable/7/sys/pci/agp_via.c ============================================================================== --- stable/7/sys/pci/agp_via.c Mon Jul 13 21:36:31 2009 (r195666) +++ stable/7/sys/pci/agp_via.c Mon Jul 13 22:13:13 2009 (r195667) @@ -85,8 +85,14 @@ agp_via_match(device_t dev) return ("VIA 3296 (P4M800) host to PCI bridge"); case 0x03051106: return ("VIA 82C8363 (Apollo KT133x/KM133) host to PCI bridge"); + case 0x03141106: + return ("VIA 3314 (P4M800CE) host to PCI bridge"); case 0x03241106: return ("VIA VT3324 (CX700) host to PCI bridge"); + case 0x03271106: + return ("VIA 3327 (P4M890) host to PCI bridge"); + case 0x03641106: + return ("VIA 3364 (P4M900) host to PCI bridge"); case 0x03911106: return ("VIA 8371 (Apollo KX133) host to PCI bridge"); case 0x05011106: @@ -168,7 +174,10 @@ agp_via_attach(device_t dev) case 0x02591106: case 0x02691106: case 0x02961106: + case 0x03141106: case 0x03241106: + case 0x03271106: + case 0x03641106: case 0x31231106: case 0x31681106: case 0x31891106: