Date: Sat, 11 Jun 2022 12:06:40 +0000 From: bugzilla-noreply@freebsd.org To: toolchain@FreeBSD.org Subject: [Bug 264590] assembler generates wrong opcodes of instructions fdiv fdivp fdivr fdivrp fsub fsubp fsubr fsubrp Message-ID: <bug-264590-29464-GQnSvVTy3N@https.bugs.freebsd.org/bugzilla/> In-Reply-To: <bug-264590-29464@https.bugs.freebsd.org/bugzilla/> References: <bug-264590-29464@https.bugs.freebsd.org/bugzilla/>
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https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D264590 --- Comment #8 from var@schellong.biz --- # define EXCHANGE 1 #if EXCHANGE > 0 # define fsubp "fsubrp" # define fsubrp "fsubp" # define fdivp "fdivrp" # define fdivrp "fdivp" #else # define fsubp "fsubp" # define fsubrp "fsubrp" # define fdivp "fdivp" # define fdivrp "fdivrp" #endif #undef EXCHANGE A countermeasure. --=20 You are receiving this mail because: You are the assignee for the bug.=
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