Date: Thu, 21 Sep 2023 12:01:28 -0700 From: Mark Millard <marklmi@yahoo.com> To: Glen Barber <gjb@FreeBSD.org>, FreeBSD ARM List <freebsd-arm@freebsd.org> Subject: FYI: snapshot images FreeBSD-15.0-CURRENT-arm64-aarch64*230921-febba4622b60-265435*.img* panic on cortex-A57/72/73/75 Message-ID: <532BA242-06CD-4C3F-A1A5-428A9626A9E5@yahoo.com> References: <532BA242-06CD-4C3F-A1A5-428A9626A9E5.ref@yahoo.com>
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The snapshot images: FreeBSD-15.0-CURRENT-arm64-aarch64*230921-febba4622b60-265435*.img* are all missing the following later update and, so, get a panic on Coretex-A57/A72/A73/A75 based systems. The panic message is: panic: Assertion smccc_version !=3D 0 failed at = /usr/src/sys/dev/psci/smccc.c:81 The missing change is . . . URL: = https://cgit.FreeBSD.org/src/commit/?id=3D843bea18711d726cd2f0a3c3f9144b21= 8e4de3e8 commit 843bea18711d726cd2f0a3c3f9144b218e4de3e8 Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2023-09-21 09:32:55 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2023-09-21 09:32:55 +0000 arm64: Move all BP hardening quirks later =20 Some quirks were missed due to the change being initially written on = a branch where they are all merged. Move all calls to install_psci_bp_hardening until after device drivers have attached. =20 Sponsored by: Arm Ltd --- sys/arm64/arm64/cpu_errata.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/sys/arm64/arm64/cpu_errata.c b/sys/arm64/arm64/cpu_errata.c index 6c294ff1237c..fee22240bb0e 100644 --- a/sys/arm64/arm64/cpu_errata.c +++ b/sys/arm64/arm64/cpu_errata.c @@ -67,21 +67,25 @@ static struct cpu_quirks cpu_quirks[] =3D { .midr_mask =3D CPU_IMPL_MASK | CPU_PART_MASK, .midr_value =3D CPU_ID_RAW(CPU_IMPL_ARM, = CPU_PART_CORTEX_A57,0,0), .quirk_install =3D install_psci_bp_hardening, + .flags =3D CPU_QUIRK_POST_DEVICE, }, { .midr_mask =3D CPU_IMPL_MASK | CPU_PART_MASK, .midr_value =3D CPU_ID_RAW(CPU_IMPL_ARM, = CPU_PART_CORTEX_A72,0,0), .quirk_install =3D install_psci_bp_hardening, + .flags =3D CPU_QUIRK_POST_DEVICE, }, { .midr_mask =3D CPU_IMPL_MASK | CPU_PART_MASK, .midr_value =3D CPU_ID_RAW(CPU_IMPL_ARM, = CPU_PART_CORTEX_A73,0,0), .quirk_install =3D install_psci_bp_hardening, + .flags =3D CPU_QUIRK_POST_DEVICE, }, { .midr_mask =3D CPU_IMPL_MASK | CPU_PART_MASK, .midr_value =3D CPU_ID_RAW(CPU_IMPL_ARM, = CPU_PART_CORTEX_A75,0,0), .quirk_install =3D install_psci_bp_hardening, + .flags =3D CPU_QUIRK_POST_DEVICE, }, { .midr_mask =3D CPU_IMPL_MASK | CPU_PART_MASK, =3D=3D=3D Mark Millard marklmi at yahoo.com
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