From owner-svn-src-head@freebsd.org Mon Jul 23 09:54:29 2018 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id B0FF91045951; Mon, 23 Jul 2018 09:54:29 +0000 (UTC) (envelope-from br@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 6485A74FA2; Mon, 23 Jul 2018 09:54:29 +0000 (UTC) (envelope-from br@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4199D1B05B; Mon, 23 Jul 2018 09:54:29 +0000 (UTC) (envelope-from br@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w6N9sTaF081282; Mon, 23 Jul 2018 09:54:29 GMT (envelope-from br@FreeBSD.org) Received: (from br@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w6N9sSe5081280; Mon, 23 Jul 2018 09:54:28 GMT (envelope-from br@FreeBSD.org) Message-Id: <201807230954.w6N9sSe5081280@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: br set sender to br@FreeBSD.org using -f From: Ruslan Bukin Date: Mon, 23 Jul 2018 09:54:28 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r336633 - in head: lib/libc/riscv/gen sys/riscv/include X-SVN-Group: head X-SVN-Commit-Author: br X-SVN-Commit-Paths: in head: lib/libc/riscv/gen sys/riscv/include X-SVN-Commit-Revision: 336633 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 23 Jul 2018 09:54:29 -0000 Author: br Date: Mon Jul 23 09:54:28 2018 New Revision: 336633 URL: https://svnweb.freebsd.org/changeset/base/336633 Log: Fix setjmp for RISC-V: o The correct value for _JB_SIGMASK is 27. o The storage size for double-precision floating point register is 8 bytes. Submitted by: "James Clarke" Reviewed by: markj@ Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D16344 Modified: head/lib/libc/riscv/gen/_setjmp.S head/lib/libc/riscv/gen/setjmp.S head/sys/riscv/include/setjmp.h Modified: head/lib/libc/riscv/gen/_setjmp.S ============================================================================== --- head/lib/libc/riscv/gen/_setjmp.S Mon Jul 23 09:16:23 2018 (r336632) +++ head/lib/libc/riscv/gen/_setjmp.S Mon Jul 23 09:54:28 2018 (r336633) @@ -63,19 +63,19 @@ ENTRY(_setjmp) #if !defined(_STANDALONE) && defined(__riscv_float_abi_double) /* Store the fpe registers */ - fsd fs0, (0 * 16)(a0) - fsd fs1, (1 * 16)(a0) - fsd fs2, (2 * 16)(a0) - fsd fs3, (3 * 16)(a0) - fsd fs4, (4 * 16)(a0) - fsd fs5, (5 * 16)(a0) - fsd fs6, (6 * 16)(a0) - fsd fs7, (7 * 16)(a0) - fsd fs8, (8 * 16)(a0) - fsd fs9, (9 * 16)(a0) - fsd fs10, (10 * 16)(a0) - fsd fs11, (11 * 16)(a0) - addi a0, a0, (12 * 16) + fsd fs0, (0 * 8)(a0) + fsd fs1, (1 * 8)(a0) + fsd fs2, (2 * 8)(a0) + fsd fs3, (3 * 8)(a0) + fsd fs4, (4 * 8)(a0) + fsd fs5, (5 * 8)(a0) + fsd fs6, (6 * 8)(a0) + fsd fs7, (7 * 8)(a0) + fsd fs8, (8 * 8)(a0) + fsd fs9, (9 * 8)(a0) + fsd fs10, (10 * 8)(a0) + fsd fs11, (11 * 8)(a0) + addi a0, a0, (12 * 8) #endif /* Return value */ @@ -116,19 +116,19 @@ ENTRY(_longjmp) #if !defined(_STANDALONE) && defined(__riscv_float_abi_double) /* Restore the fpe registers */ - fld fs0, (0 * 16)(a0) - fld fs1, (1 * 16)(a0) - fld fs2, (2 * 16)(a0) - fld fs3, (3 * 16)(a0) - fld fs4, (4 * 16)(a0) - fld fs5, (5 * 16)(a0) - fld fs6, (6 * 16)(a0) - fld fs7, (7 * 16)(a0) - fld fs8, (8 * 16)(a0) - fld fs9, (9 * 16)(a0) - fld fs10, (10 * 16)(a0) - fld fs11, (11 * 16)(a0) - addi a0, a0, (12 * 16) + fld fs0, (0 * 8)(a0) + fld fs1, (1 * 8)(a0) + fld fs2, (2 * 8)(a0) + fld fs3, (3 * 8)(a0) + fld fs4, (4 * 8)(a0) + fld fs5, (5 * 8)(a0) + fld fs6, (6 * 8)(a0) + fld fs7, (7 * 8)(a0) + fld fs8, (8 * 8)(a0) + fld fs9, (9 * 8)(a0) + fld fs10, (10 * 8)(a0) + fld fs11, (11 * 8)(a0) + addi a0, a0, (12 * 8) #endif /* Load the return value */ Modified: head/lib/libc/riscv/gen/setjmp.S ============================================================================== --- head/lib/libc/riscv/gen/setjmp.S Mon Jul 23 09:16:23 2018 (r336632) +++ head/lib/libc/riscv/gen/setjmp.S Mon Jul 23 09:54:28 2018 (r336633) @@ -77,19 +77,19 @@ ENTRY(setjmp) #ifdef __riscv_float_abi_double /* Store the fpe registers */ - fsd fs0, (0 * 16)(a0) - fsd fs1, (1 * 16)(a0) - fsd fs2, (2 * 16)(a0) - fsd fs3, (3 * 16)(a0) - fsd fs4, (4 * 16)(a0) - fsd fs5, (5 * 16)(a0) - fsd fs6, (6 * 16)(a0) - fsd fs7, (7 * 16)(a0) - fsd fs8, (8 * 16)(a0) - fsd fs9, (9 * 16)(a0) - fsd fs10, (10 * 16)(a0) - fsd fs11, (11 * 16)(a0) - addi a0, a0, (12 * 16) + fsd fs0, (0 * 8)(a0) + fsd fs1, (1 * 8)(a0) + fsd fs2, (2 * 8)(a0) + fsd fs3, (3 * 8)(a0) + fsd fs4, (4 * 8)(a0) + fsd fs5, (5 * 8)(a0) + fsd fs6, (6 * 8)(a0) + fsd fs7, (7 * 8)(a0) + fsd fs8, (8 * 8)(a0) + fsd fs9, (9 * 8)(a0) + fsd fs10, (10 * 8)(a0) + fsd fs11, (11 * 8)(a0) + addi a0, a0, (12 * 8) #endif /* Return value */ @@ -146,19 +146,19 @@ ENTRY(longjmp) #ifdef __riscv_float_abi_double /* Restore the fpe registers */ - fld fs0, (0 * 16)(a0) - fld fs1, (1 * 16)(a0) - fld fs2, (2 * 16)(a0) - fld fs3, (3 * 16)(a0) - fld fs4, (4 * 16)(a0) - fld fs5, (5 * 16)(a0) - fld fs6, (6 * 16)(a0) - fld fs7, (7 * 16)(a0) - fld fs8, (8 * 16)(a0) - fld fs9, (9 * 16)(a0) - fld fs10, (10 * 16)(a0) - fld fs11, (11 * 16)(a0) - addi a0, a0, (12 * 16) + fld fs0, (0 * 8)(a0) + fld fs1, (1 * 8)(a0) + fld fs2, (2 * 8)(a0) + fld fs3, (3 * 8)(a0) + fld fs4, (4 * 8)(a0) + fld fs5, (5 * 8)(a0) + fld fs6, (6 * 8)(a0) + fld fs7, (7 * 8)(a0) + fld fs8, (8 * 8)(a0) + fld fs9, (9 * 8)(a0) + fld fs10, (10 * 8)(a0) + fld fs11, (11 * 8)(a0) + addi a0, a0, (12 * 8) #endif /* Load the return value */ Modified: head/sys/riscv/include/setjmp.h ============================================================================== --- head/sys/riscv/include/setjmp.h Mon Jul 23 09:16:23 2018 (r336632) +++ head/sys/riscv/include/setjmp.h Mon Jul 23 09:54:28 2018 (r336633) @@ -40,7 +40,7 @@ #include #define _JBLEN 63 /* sp, ra, [f]s0-11, magic val, sigmask */ -#define _JB_SIGMASK 21 +#define _JB_SIGMASK 27 #ifdef __ASSEMBLER__ #define _JB_MAGIC__SETJMP 0xbe87fd8a2910af00