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Date:      Thu, 12 Dec 2002 22:58:43 -0500
From:      "Charles Swiger" <cswiger@mac.com>
To:        <freebsd-stable@FreeBSD.ORG>
Subject:   Re: Cyrix CPUs, was: Re: Repeatable crash from nautilus2
Message-ID:  <004901c2a25c$0c381c50$0301a8c0@prime>
References:  <20021213021012.61714.qmail@web40303.mail.yahoo.com>

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Rhett Monteg Hollander wrote:
[ ... ]
> What Cyrix CPU? And what OS'es? And maybe vice versa?
> I do remember hard issues with WinNT 3.51 and original
> Win'95 when running on Cyrix 5x86\6x86 or NexGen
> Nx586.

NEXTSTEP/Intel 3.1 - OPENSTEP 4.2; do a search for OmniWeb, which was a common
multithreaded WWW client for that platform which tended to trigger hardware
panics on non-Intel CPUs like the Cyrix.  LINT under FreeBSD also appears to
have a relevant section:

# CPU_BTB_EN enables branch target buffer on Cyrix 5x86 (NOTE 1).
#
# CPU_DIRECT_MAPPED_CACHE sets L1 cache of Cyrix 486DLC CPU in direct
# mapped mode.  Default is 2-way set associative mode.
#
# CPU_CYRIX_NO_LOCK enables weak locking for the entire address space
# of Cyrix 6x86 and 6x86MX CPUs by setting the NO_LOCK bit of CCR1.
# Otherwise, the NO_LOCK bit of CCR1 is cleared.  (NOTE 3)
[ ... ]
# NOTE 1: The options, CPU_BTB_EN, CPU_LOOP_EN, CPU_IORT,
# CPU_LOOP_EN and CPU_RSTK_EN should not be used because of CPU bugs.
# These options may crash your system.
#
# NOTE 2: If CYRIX_CACHE_REALLY_WORKS is not set, CPU cache is enabled
# in write-through mode when revision < 2.7.  If revision of Cyrix
# 6x86 >= 2.7, CPU cache is always enabled in write-back mode.
#
# NOTE 3: This option may cause failures for software that requires
# locked cycles in order to operate correctly.

Yum.  Sounds tasty.

-Chuck

PS: I think the guys at NeXT decided that the x86 platform had enough issues
without trying to work around broken hardware; in hindsight, that may have been
a wrong decision, but I'm still using a 33MHz 68040 NeXTstation as a primary
machine.


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