Date: Wed, 8 Dec 2021 11:33:28 +0100 From: Emmanuel Vadot <manu@bidouilliste.com> To: Wojciech Macek <wma@FreeBSD.org> Cc: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: Re: git: de9c000cedfe - main - sdhci_fsl_fdt: Add support for HS200/HS400 modes Message-ID: <20211208113328.295de39f3c1b976d5c07531f@bidouilliste.com> In-Reply-To: <202112081021.1B8ALYH0041586@gitrepo.freebsd.org> References: <202112081021.1B8ALYH0041586@gitrepo.freebsd.org>
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On Wed, 8 Dec 2021 10:21:34 GMT Wojciech Macek <wma@FreeBSD.org> wrote: > The branch main has been updated by wma: > > URL: https://cgit.FreeBSD.org/src/commit/?id=de9c000cedfe77c6da4929178fee571b1fd0cc80 > > commit de9c000cedfe77c6da4929178fee571b1fd0cc80 > Author: Hubert Mazur <hum@semihalf.com> > AuthorDate: 2021-11-03 09:38:05 +0000 > Commit: Wojciech Macek <wma@FreeBSD.org> > CommitDate: 2021-12-08 10:21:02 +0000 > > sdhci_fsl_fdt: Add support for HS200/HS400 modes > > The controller requires some custom logic to perform MMC tuning > and to later switch to HS400 mode. Implement it supplying mmcbr_tune > and sdhci_set_uhs_timing devmethods respectivly. Since the latter > is called unconditionally when the ios is updated we need to keep > track of the tuning state in sc and execute the HS400 switch logic > only when required. > > Two HS200/HS400 related errata were implemented. > 1. In HS400 modes the clock divisors are limited to 4, 8, 12. > Apply it by falling back to the closes, higher divider when needed. > 2. Hardware tuning procedure can sometimes fails. If that is the case > fallback to the software tuning. > > Reviewed by: manu, mw I did not review that one, it's way larger than the other ones so I wanted to have a look later. > Obtained from: Semihalf > Sponsored by: Alstom Group > Differential revision: https://reviews.freebsd.org/D33320 -- Emmanuel Vadot <manu@bidouilliste.com> <manu@freebsd.org>
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