From owner-freebsd-arm@freebsd.org Sat Apr 10 15:47:51 2021 Return-Path: Delivered-To: freebsd-arm@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id E79BB5D04F2 for ; Sat, 10 Apr 2021 15:47:51 +0000 (UTC) (envelope-from pcc@gmx.net) Received: from mout.gmx.net (mout.gmx.net [212.227.17.21]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "mout.gmx.net", Issuer "TeleSec ServerPass Class 2 CA" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4FHfXQ5sPJz3jmd for ; Sat, 10 Apr 2021 15:47:50 +0000 (UTC) (envelope-from pcc@gmx.net) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1618069666; bh=Jfrk8vEWQJktFLhdwjaaKVOylipb2uMbK83j8mPNEvw=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=ZGuN8QA68/BJ9vnnhNV3AquhCWi53jRA5xFe9PKlDmfuejE8fIijzcwY3gmzTyjyP FV+H48fLebE3KanUunF6kBFzM4iVFNCVpv8rxvJf7OjZ+woc6l5fy9+Xrz5Y48Kwhc k7oGv4a2u+NNSis4nctqXrIoOG5Hhr+JOeBNxaNE= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from [77.185.195.129] ([77.185.195.129]) by web-mail.gmx.net (3c-app-gmx-bap64.server.lan [172.19.172.134]) (via HTTP); Sat, 10 Apr 2021 17:47:46 +0200 MIME-Version: 1.0 Message-ID: From: Peter Cornelius To: freebsd-arm Subject: Re: JMicron jms561 umass on arm64? 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Darn. Nope. Of course not. Just blind. I put that to the side thinking it all was about managing the display and the fan. Which, embarrasingly, and of course, it was not. Sigh. Never mind. I hope that this sitting-alone-at-home soon stops. I seem to need someone else's eyes on once in a while. Otoh, isn't that what the mailing lists are for... > The PINOUT shows "reset SATA3/4" function GPIO_RST2 on pin #37 > of the 40 PIN GPIO header and "reset SATA 1/2" function > GPIO_RST1 on pin #22 of that header. (There is more but > this much seems to establish that more than USB is involved > in using SATA drives.) And so it is (usr/bin/rockpi-sata/misc.py, from [6]) def disk_turn_on(): blk1 = get_blk() set_mode(26, GPIO.HIGH) time.sleep(0.5) set_mode(25, GPIO.HIGH) wait_blk(10) blk2 = get_blk() conf['disk'] = sorted(list(set(blk2) - set(blk1))) def disk_turn_off(): set_mode(26, GPIO.LOW) time.sleep(0.5) set_mode(25, GPIO.LOW) Which are just pins 22 and 37 [7], [8] (blk.* just get the list of disks from Linux lsblk). So, it looks like that it boiled down to just setting the two pins to high, and the disks should be there (and gone if low)... That would be easy to test (and possible python for fan and display and so on to come later). I find that gpioctl -l reports 54 GPIO pins. How does that relate to the 58 pins the BCM2711 has [9]? I also seem blind to the way we are assigning the pins... /usr/src/sys/contrib/device-tree/src/arm/bcm2711-rpi-4-b.dts also lists 58 as in [9]. Thanks again, and All the best, Peter. --- > > [1] I believe, https://www.jmicron.com/file/download/1026/JMS561_Product+Brief.pdf > > [2] https://wiki.radxa.com/Dual_Quad_SATA_HAT > > [3] Note: Later builds so far have not booted despite of current Firmware/Das U-Boot (March 2021) > > FreeBSD rpi4 14.0-CURRENT FreeBSD 14.0-CURRENT #1: Tue Feb 23 02:30:31 UTC 2021 > > root@rpi4:/usr/obj/usr/src/arm64.aarch64/sys/GENERIC arm64 > > [4] https://jamesachambers.com/raspberry-pi-4-bootloader-firmware-updating-recovery-guide/ > > [5] https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=252971 [6] https://github.com/akgnah/rockpi-sata [7] https://www.tomshardware.com/reviews/raspberry-pi-gpio-pinout,6122.html [8] https://www.raspberrypi.org/documentation/usage/gpio/ [9] https://datasheets.raspberrypi.org/bcm2711/bcm2711-peripherals.pdf