From owner-freebsd-current  Wed Jan 17  8:40:39 2001
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Date: Wed, 17 Jan 2001 08:40:10 -0800 (PST)
From: John Baldwin <jhb@FreeBSD.org>
To: Garrett Wollman <wollman@khavrinen.lcs.mit.edu>
Subject: Re: Atomic breakage?
Cc: current@FreeBSD.org, Peter Jeremy <peter.jeremy@alcatel.com.au>
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On 17-Jan-01 Garrett Wollman wrote:
> <<On Wed, 17 Jan 2001 14:26:54 +1100, Peter Jeremy
> <peter.jeremy@alcatel.com.au> said:
> 
>> To support multiple masters, you need proper locks.
> 
> On older processors, yes.  On processors with the CX8 feature bit set,
> you can do it without any sort of locking (indeed, this is a primitive
> that semaphores can be built upon).  Consider the following:
> 
> atomic_increment:
>       ; prologue
>       ; get EA into %esi
>       movl (%esi), %eax
>       movl 4(%esi), %edx
> 1:    movl %eax, %ebx
>       movl %edx, %ecx
>       incl %ebx
>       adcl $0, %ecx
>       cmpxchg8b (%esi)        ; generates a locked bus cycle
>       jne 1
>       ; epilogue
> 
> On pre-Pentium processors (which lack the CX8 feature) this sort of
> sequence is impossible.  OTOH, I don't think SMP works on any
> pre-Pentium processor, so again this degenerates to:
> 
>       pushfl
>       cli
>       incl (%esi)
>       adcl $0, 4(%esi)
>       popfl
> 
> ...in the non-SMP case.

Early Pentiums (<= P90) don't support CX8 or so I've heard, which make this
slightly more complicated, as for a pentium we would have to use a function
pointer that we setup during probe.  Also, during a SMP boot we would have to
panic if CX8 wasn't enabled on all CPU's.

> -GAWollman

-- 

John Baldwin <jhb@FreeBSD.org> -- http://www.FreeBSD.org/~jhb/
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"Power Users Use the Power to Serve!"  -  http://www.FreeBSD.org/


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