From owner-svn-src-projects@FreeBSD.ORG Sun Nov 3 22:58:01 2013 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id E43A1D74; Sun, 3 Nov 2013 22:58:00 +0000 (UTC) (envelope-from marcel@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id D07E1285A; Sun, 3 Nov 2013 22:58:00 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id rA3Mw0Zm081320; Sun, 3 Nov 2013 22:58:00 GMT (envelope-from marcel@svn.freebsd.org) Received: (from marcel@localhost) by svn.freebsd.org (8.14.7/8.14.5/Submit) id rA3Mw08k081316; Sun, 3 Nov 2013 22:58:00 GMT (envelope-from marcel@svn.freebsd.org) Message-Id: <201311032258.rA3Mw08k081316@svn.freebsd.org> From: Marcel Moolenaar Date: Sun, 3 Nov 2013 22:58:00 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r257596 - in projects/altix2/sys/ia64: ia64 include X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 03 Nov 2013 22:58:01 -0000 Author: marcel Date: Sun Nov 3 22:57:59 2013 New Revision: 257596 URL: http://svnweb.freebsd.org/changeset/base/257596 Log: Make IPIs work on the Altix 450. We kluged support by hardcoding specifics of the SHub1 in ipi_send(). Improve the kluge a bit by saving the IPI register address of the SHub in the PCPU structure and initialize it when we create the PCPU. There we can ask the firmware about the SHub and handle the difference between SHub1 and SHub2. This makes SMP work. Sponsored by: HOB GmbH & Co. KG Modified: projects/altix2/sys/ia64/ia64/machdep.c projects/altix2/sys/ia64/ia64/mp_machdep.c projects/altix2/sys/ia64/include/pcpu.h Modified: projects/altix2/sys/ia64/ia64/machdep.c ============================================================================== --- projects/altix2/sys/ia64/ia64/machdep.c Sun Nov 3 22:55:33 2013 (r257595) +++ projects/altix2/sys/ia64/ia64/machdep.c Sun Nov 3 22:57:59 2013 (r257596) @@ -529,16 +529,25 @@ void cpu_pcpu_setup(struct pcpu *pc, u_int acpi_id, u_int sapic_id) { struct ia64_sal_result r; + uint64_t mmr; + u_int shft, shub; pc->pc_acpi_id = acpi_id; pc->pc_md.lid = IA64_LID_SET_SAPIC_ID(sapic_id); r = ia64_sal_entry(SAL_SGISN_SAPIC_INFO, sapic_id, 0, 0, 0, 0, 0, 0); - if (r.sal_status == 0) { - pc->pc_md.sgisn_nasid = r.sal_result[0]; - pc->pc_md.sgisn_subnode = r.sal_result[1]; - pc->pc_md.sgisn_slice = r.sal_result[2]; - } + if (r.sal_status != 0) + return; + pc->pc_md.sgisn_nasid = r.sal_result[0]; + + r = ia64_sal_entry(SAL_SGISN_SN_INFO, 0, 0, 0, 0, 0, 0, 0); + if (r.sal_status != 0) + return; + shub = r.sal_result[0] & 0xff; + shft = (r.sal_result[1] >> 16) & 0xff; + mmr = ((u_long)pc->pc_md.sgisn_nasid << shft) | + (((shub == 0) ? 9UL : 3UL) << 32); + pc->pc_md.sgisn_ipip = IA64_PHYS_TO_RR6(mmr + 0x10000380UL); } void Modified: projects/altix2/sys/ia64/ia64/mp_machdep.c ============================================================================== --- projects/altix2/sys/ia64/ia64/mp_machdep.c Sun Nov 3 22:55:33 2013 (r257595) +++ projects/altix2/sys/ia64/ia64/mp_machdep.c Sun Nov 3 22:57:59 2013 (r257596) @@ -526,7 +526,9 @@ ipi_send(struct pcpu *cpu, int xiv) uint64_t ipi; u_int sapic_id; - KASSERT(xiv != 0, ("ipi_send")); + KASSERT(xiv != 0, ("%s: xiv==0", __func__)); + + critical_enter(); sapic_id = IA64_LID_GET_SAPIC_ID(cpu->pc_md.lid); @@ -534,14 +536,17 @@ ipi_send(struct pcpu *cpu, int xiv) ipip = &(ia64_pib->ib_ipi[sapic_id][0]); ipi = xiv; } else { - ipip = (void *)(IA64_PHYS_TO_RR6(0x800000000UL) | - ((u_long)cpu->pc_md.sgisn_nasid << 38) | 0x110000380UL); + ipip = (uint64_t *)(cpu->pc_md.sgisn_ipip); ipi = 0x80000001fdc00000UL | ((u_long)xiv << 52) | (sapic_id << 4); } + KASSERT(ipip != NULL, ("%s: ipip==NULL", __func__)); ia64_mf(); ia64_st8(ipip, ipi); ia64_mf_a(); + CTR3(KTR_SMP, "ipi_send(%p, %d): cpuid=%d", cpu, xiv, PCPU_GET(cpuid)); + + critical_exit(); } Modified: projects/altix2/sys/ia64/include/pcpu.h ============================================================================== --- projects/altix2/sys/ia64/include/pcpu.h Sun Nov 3 22:55:33 2013 (r257595) +++ projects/altix2/sys/ia64/include/pcpu.h Sun Nov 3 22:57:59 2013 (r257596) @@ -55,8 +55,7 @@ struct pcpu_md { uint64_t clock_load; /* Clock reload value. */ uint32_t clock_mode; /* Clock ET mode */ uint32_t sgisn_nasid; - uint32_t sgisn_subnode; - uint32_t sgisn_slice; + uint64_t sgisn_ipip; uint32_t awake:1; /* CPU is awake? */ struct pcpu_stats stats; /* Interrupt stats. */ #ifdef _KERNEL