Date: Wed, 18 Oct 2006 20:16:23 +0200 From: "Attilio Rao" <attilio@freebsd.org> To: "ranjith kumar" <ranjith_kumar_b4u@yahoo.com> Cc: freebsd-ia32@freebsd.org Subject: Re: hard-ware prefetching Message-ID: <3bbf2fe10610181116w64407a43j83e1acfa16c6c9d5@mail.gmail.com> In-Reply-To: <20061016151137.56240.qmail@web58405.mail.re3.yahoo.com> References: <20061016151137.56240.qmail@web58405.mail.re3.yahoo.com>
next in thread | previous in thread | raw e-mail | index | archive | help
2006/10/16, ranjith kumar <ranjith_kumar_b4u@yahoo.com>: > Hi everyone, > I am new to this mailing list. > > > I have just started reading about architectural > features of "pentium-4". > > I have following questions: > > 1) I have read "IA-32 software developers manuals". > No information has been given about hardware > prefetching. > Can anyone suggest some material which explains > more details about "hardware prefetching" (pentium4 if > possible). You have to look at this: http://www.intel.com/design/Pentium4/documentation.htm#manuals and possibly give a look at the "Pentium 4 optimizations manual". BTW, even if I'm not aware of what informations do you need about prefetching, P4 offers prefetch[n]-nta instructions that you can find in the "IA32 Architecture Manual, vol 2". Prefetching can be emulated in someway... but it needs a better explanatory here. > 2) This is a non-technical question. > Does Intel company reveals all details about its > processors(say pentium-4) like what is the exact > dynamic branching algorithm used to predict > conditional branches...etc? You can find some descriptions in every good book about computer architectures... Attilio -- Peace can only be achieved by understanding - A. Einstein
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?3bbf2fe10610181116w64407a43j83e1acfa16c6c9d5>