From owner-freebsd-current@FreeBSD.ORG Sun Dec 10 00:42:17 2006 Return-Path: X-Original-To: freebsd-current@freebsd.org Delivered-To: freebsd-current@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id DF85216A492 for ; Sun, 10 Dec 2006 00:42:17 +0000 (UTC) (envelope-from dimitry@andric.com) Received: from tensor.andric.com (tensor.andric.com [213.154.244.69]) by mx1.FreeBSD.org (Postfix) with ESMTP id 8CDE643C9E for ; Sun, 10 Dec 2006 00:41:10 +0000 (GMT) (envelope-from dimitry@andric.com) Received: from [192.168.0.3] (kilgore.lan.dim [192.168.0.3]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by tensor.andric.com (Postfix) with ESMTP id 49C47B80C; Sun, 10 Dec 2006 01:42:15 +0100 (CET) Message-ID: <457B57E5.30705@andric.com> Date: Sun, 10 Dec 2006 01:42:13 +0100 From: Dimitry Andric User-Agent: Thunderbird 2.0b1 (Windows/20061208) MIME-Version: 1.0 To: Adam McDougall References: <20061210002923.GO81923@egr.msu.edu> In-Reply-To: <20061210002923.GO81923@egr.msu.edu> X-Enigmail-Version: 0.94.0.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: freebsd-current@freebsd.org Subject: Re: cpufreq est and Enhanced Sleep (Cx) States for Intel Core and above X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 10 Dec 2006 00:42:18 -0000 Adam McDougall wrote: > src/sys/i386/cpufreq/est.c has many Pentium M cpus but nothing > from the Intel Core and Core 2 families that I can see. I tried > looking up the values myself, but could not find them in: > http://www.intel.com/design/mobile/datashts/314078.htm > > It seems that even the latest version of the Linux kernel does not > list values for at least Yonah (Core 2). Is it a big mystery, or is > this data actually available somewhere? The SpeedStep tables for newer Pentium M and Core models are kept secret by Intel. For some unknown reason, they only want to give out this information to "BIOS writers", probably under some very cumbersome NDA. And then you are at the mercy of those buggy BIOSes' ACPI implementation... I have no idea why it suddenly became so important to hide it, since they used to publish it freely in their older datasheets. If anyone is able to put some pressure on Intel to give out this info again, please do so. > I have a Core 2 Duo > T7600 in my laptop and est won't touch my cpu because it doesn't > recognize it. I did get it to use some other form of speed control > by putting hint.acpi_perf.0.disabled="1" in /boot/loader.conf according > to another post. In OpenBSD, we use a little trick to be able to use at least the lowest and highest power states, so the SpeedStep feature is actually usable, and useful. But still, it would be much nicer to just have the "official" state tables.