From owner-freebsd-arm@freebsd.org Fri Aug 7 08:43:23 2015 Return-Path: Delivered-To: freebsd-arm@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 021499B6BEF for ; Fri, 7 Aug 2015 08:43:23 +0000 (UTC) (envelope-from mihai.carabas@gmail.com) Received: from mail-wi0-x22e.google.com (mail-wi0-x22e.google.com [IPv6:2a00:1450:400c:c05::22e]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 94ED31587 for ; Fri, 7 Aug 2015 08:43:22 +0000 (UTC) (envelope-from mihai.carabas@gmail.com) Received: by wibhh20 with SMTP id hh20so56388878wib.0 for ; Fri, 07 Aug 2015 01:43:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:date:message-id:subject:from:to:content-type; bh=DtIjxUJ3GUMf2pTCW2gmjaZsJ++iwWi+kr7oMtjSiRg=; b=W+82R7xARM0H+ZK3Q0SceJXZ+sTnqb3zG8dGT4szQ2q5rZMtREtawQVsFF/Y0W4Lmi 7ML3IHto3GJcJ88nxU0wciao1flxXr/RtjDgbC9phmB/bZ1sy2NLluffNdMxG3tSCR2t 17GZQ6rPsoHWSo4JaMRaqqkPfCor1Trno34vqvleGvSdTeReGKqVe+rW6kgM/a6srEYJ urtBgl9v38W5FFMDLKig8AR88DnMDEbf0QGHQavXEZOErJjeb4OxIpqcEprgKFE4UcEU AWfmMdo5hdB2WLxRC9g4HcJvDUajAWPsKZLMtPFzR5uTmudf38mwhe3WCk8tnQ9UkK63 E2WA== MIME-Version: 1.0 X-Received: by 10.180.94.168 with SMTP id dd8mr4165846wib.76.1438937001163; Fri, 07 Aug 2015 01:43:21 -0700 (PDT) Received: by 10.28.21.134 with HTTP; Fri, 7 Aug 2015 01:43:21 -0700 (PDT) Date: Fri, 7 Aug 2015 11:43:21 +0300 Message-ID: Subject: how to get gic registers from dts From: Mihai Carabas To: freebsd-arm@freebsd.org Content-Type: text/plain; charset=UTF-8 X-Content-Filtered-By: Mailman/MimeDel 2.1.20 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 07 Aug 2015 08:43:23 -0000 Hello, I'm trying to integrate the VGIC infrastructure into the VMM code and I want to use some of the current GIC code. I have a generic question about how the gic registers are geting filled up in this piece of code: 167 >-------if (bus_alloc_resources(dev, arm_gic_spec, sc->gic_res)) { 168 >------->-------device_printf(dev, "could not allocate resources\n"); 169 >------->-------return (ENXIO); 170 >-------} 171 172 >-------arm_post_filter = gic_post_filter; 173 174 >-------/* Distributor Interface */ 175 >-------sc->gic_d_bst = rman_get_bustag(sc->gic_res[0]); 176 >-------sc->gic_d_bsh = rman_get_bushandle(sc->gic_res[0]); 177 178 >-------/* CPU Interface */ 179 >-------sc->gic_c_bst = rman_get_bustag(sc->gic_res[1]); 180 >-------sc->gic_c_bsh = rman_get_bushandle(sc->gic_res[1]); So bus_alloc_resource allocates the gic_res, but in that code I coudn't find where the bustag and bushandle are getting populated. I need to get the GICH_* and GICV_* registers (which are in the thrid and forth position in the DTS) and I must understand the logic. Thank you, Mihai Carabas