From nobody Thu Feb 2 21:00:57 2023 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4P7B5m6bfnz3kZMc for ; Thu, 2 Feb 2023 21:01:00 +0000 (UTC) (envelope-from jrtc27@jrtc27.com) Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "smtp.gmail.com", Issuer "GTS CA 1D4" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4P7B5m0zqZz3C64 for ; Thu, 2 Feb 2023 21:01:00 +0000 (UTC) (envelope-from jrtc27@jrtc27.com) Authentication-Results: mx1.freebsd.org; none Received: by mail-wr1-f51.google.com with SMTP id y1so2894511wru.2 for ; Thu, 02 Feb 2023 13:01:00 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=to:references:message-id:content-transfer-encoding:cc:date :in-reply-to:from:subject:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cOPccTmJBPWYMWyYcjL0vd/g/3abasYNhmnkW55Esns=; b=QD30QewsTOaw00FgFSUhanni32W2NDKk85gd7N1EhqHXWduMFg7nsCg6X9X96nNQo8 AaGCkoRGUYsr4qybByLHoMIcH2GAqFYNAJ6cwp1BzqS4Z+rDBDKZG/skVJR4rd1FJosD VRgwlFlJOEtZg1V3mMTlC/eAIS0IRucCcYasWW9rmMYX6aYSBMFYPuRNkwQCiBaqSfC9 hJzG1bfMH2/uSJY3dryCyq3vgrcw8P16Qm2ieM9KEsAWJ5c1OCFF7VbR+Eapl8wOlf48 SM+UG4eXSgDrI2sCtvNJp5RKAPnmZxXEjDvZoUne1TuBnC2pLYP6wFa5d1hSJn3h0pnV /ecg== X-Gm-Message-State: AO0yUKUPjRZnnVilBzhE3MXS6bNIMxiz5+Cavsbr895LX09DjyDm1ba/ 64VrCKVqLjxK0T0c1kflc8fR7w== X-Google-Smtp-Source: AK7set8EGCuB48KNCJidZMHaO0A44hnd3JJQao92w1HUTzXgcQpE7+YbEKaTS3vkqEw78GjshGutmQ== X-Received: by 2002:a5d:44d1:0:b0:2bf:bc0a:361d with SMTP id z17-20020a5d44d1000000b002bfbc0a361dmr6210996wrr.31.1675371658591; Thu, 02 Feb 2023 13:00:58 -0800 (PST) Received: from smtpclient.apple (global-5-143.n-2.net.cam.ac.uk. [131.111.5.143]) by smtp.gmail.com with ESMTPSA id bj24-20020a0560001e1800b002bded7da2b8sm364891wrb.102.2023.02.02.13.00.57 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 02 Feb 2023 13:00:58 -0800 (PST) Content-Type: text/plain; charset=us-ascii List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-all@freebsd.org X-BeenThere: dev-commits-src-all@freebsd.org Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3696.120.41.1.1\)) Subject: Re: git: f29942229d24 - main - Read the arm64 far early in el0 exceptions From: Jessica Clarke In-Reply-To: <202302021648.312GmSXI049747@gitrepo.freebsd.org> Date: Thu, 2 Feb 2023 21:00:57 +0000 Cc: "src-committers@freebsd.org" , "dev-commits-src-all@freebsd.org" , "dev-commits-src-main@freebsd.org" Content-Transfer-Encoding: quoted-printable Message-Id: <0E3AAA1E-0B3E-4C4F-A425-CEE13BAE8723@freebsd.org> References: <202302021648.312GmSXI049747@gitrepo.freebsd.org> To: Andrew Turner X-Mailer: Apple Mail (2.3696.120.41.1.1) X-Rspamd-Queue-Id: 4P7B5m0zqZz3C64 X-Spamd-Bar: ---- X-Spamd-Result: default: False [-4.00 / 15.00]; REPLY(-4.00)[]; ASN(0.00)[asn:15169, ipnet:209.85.128.0/17, country:US] X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-ThisMailContainsUnwantedMimeParts: N On 2 Feb 2023, at 16:48, Andrew Turner wrote: >=20 > The branch main has been updated by andrew: >=20 > URL: = https://cgit.FreeBSD.org/src/commit/?id=3Df29942229d24ebb8b98f8c5d02f3c863= 2648007e >=20 > commit f29942229d24ebb8b98f8c5d02f3c8632648007e > Author: Andrew Turner > AuthorDate: 2023-01-25 17:47:39 +0000 > Commit: Andrew Turner > CommitDate: 2023-02-02 16:43:15 +0000 >=20 > Read the arm64 far early in el0 exceptions >=20 > When handling userspace exceptions on arm64 we need to dereference = the > current thread pointer. If this is being promoted/demoted there is = a > small window where it will cause another exception to be hit. As = this > second exception will set the fault address register we will read = the > incorrect value in the userspace exception handler. >=20 > Fix this be always reading the fault address before dereferencing = the > current thread pointer. >=20 > Reported by: olivier@ > Reviewed by: markj > Sponsored by: Arm Ltd > Differential Revision: https://reviews.freebsd.org/D38196 > --- > sys/arm64/arm64/exception.S | 15 +++++++++++++++ > sys/arm64/arm64/trap.c | 26 +++++++------------------- > 2 files changed, 22 insertions(+), 19 deletions(-) >=20 > diff --git a/sys/arm64/arm64/exception.S b/sys/arm64/arm64/exception.S > index 4a74358afeb9..55bac5e5228a 100644 > --- a/sys/arm64/arm64/exception.S > +++ b/sys/arm64/arm64/exception.S > @@ -212,10 +212,25 @@ ENTRY(handle_el1h_irq) > END(handle_el1h_irq) >=20 > ENTRY(handle_el0_sync) > + /* > + * Read the fault address early. The current thread structure = may > + * be transiently unmapped if it is part of a memory range being > + * promoted or demoted to/from a superpage. As this involves a > + * break-before-make sequence there is a short period of time = where > + * an access will raise an exception. If this happens the fault > + * address will be changed to the kernel address so a later read = of > + * far_el1 will give the wrong value. > + * > + * The earliest memory access that could trigger a fault is in a > + * function called by the save_registers macro so this is the = latest > + * we can read the userspace value. > + */ > + mrs x19, far_el1 > save_registers 0 > ldr x0, [x18, #PC_CURTHREAD] > mov x1, sp > str x1, [x0, #TD_FRAME] > + mov x2, x19 > bl do_el0_sync > do_ast > restore_registers 0 > diff --git a/sys/arm64/arm64/trap.c b/sys/arm64/arm64/trap.c > index 4e54a06548cc..1b33d7aa60c4 100644 > --- a/sys/arm64/arm64/trap.c > +++ b/sys/arm64/arm64/trap.c > @@ -76,7 +76,7 @@ __FBSDID("$FreeBSD$"); >=20 > /* Called from exception.S */ > void do_el1h_sync(struct thread *, struct trapframe *); This did not address my feedback regarding EL1 debug exceptions also clobbering FAR. Jess > -void do_el0_sync(struct thread *, struct trapframe *); > +void do_el0_sync(struct thread *, struct trapframe *, uint64_t far); > void do_el0_error(struct trapframe *); > void do_serror(struct trapframe *); > void unhandled_exception(struct trapframe *); > @@ -559,11 +559,11 @@ do_el1h_sync(struct thread *td, struct trapframe = *frame) > } >=20 > void > -do_el0_sync(struct thread *td, struct trapframe *frame) > +do_el0_sync(struct thread *td, struct trapframe *frame, uint64_t far) > { > pcpu_bp_harden bp_harden; > uint32_t exception; > - uint64_t esr, far; > + uint64_t esr; > int dfsc; >=20 > /* Check we have a sane environment when entering from userland = */ > @@ -573,27 +573,15 @@ do_el0_sync(struct thread *td, struct trapframe = *frame) >=20 > esr =3D frame->tf_esr; > exception =3D ESR_ELx_EXCEPTION(esr); > - switch (exception) { > - case EXCP_INSN_ABORT_L: > - far =3D READ_SPECIALREG(far_el1); > - > + if (exception =3D=3D EXCP_INSN_ABORT_L && far > = VM_MAXUSER_ADDRESS) { > /* > * Userspace may be trying to train the branch predictor = to > * attack the kernel. If we are on a CPU affected by = this > * call the handler to clear the branch predictor state. > */ > - if (far > VM_MAXUSER_ADDRESS) { > - bp_harden =3D PCPU_GET(bp_harden); > - if (bp_harden !=3D NULL) > - bp_harden(); > - } > - break; > - case EXCP_UNKNOWN: > - case EXCP_DATA_ABORT_L: > - case EXCP_DATA_ABORT: > - case EXCP_WATCHPT_EL0: > - far =3D READ_SPECIALREG(far_el1); > - break; > + bp_harden =3D PCPU_GET(bp_harden); > + if (bp_harden !=3D NULL) > + bp_harden(); > } > intr_enable(); >=20