From owner-freebsd-mips@FreeBSD.ORG Mon Feb 24 21:50:48 2014 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 371A1E4B for ; Mon, 24 Feb 2014 21:50:48 +0000 (UTC) Received: from cdptpa-omtalb.mail.rr.com (cdptpa-omtalb.mail.rr.com [75.180.132.120]) by mx1.freebsd.org (Postfix) with ESMTP id EBC631A6B for ; Mon, 24 Feb 2014 21:50:47 +0000 (UTC) X-Authority-Analysis: v=2.0 cv=H69ZMpki c=1 sm=0 a=Hbpc8ax9VmIgqBixU/K2CA==:17 a=gAtPXoEt6xAA:10 a=dBRESv0yCI8A:10 a=ozSPa0bqj5AA:10 a=kj9zAlcOel0A:10 a=6I5d2MoRAAAA:8 a=KGjhK52YXX0A:10 a=2HekhQQKg8UA:10 a=ABho7VulOJvHIB8RjJsA:9 a=CjuIK1q_8ugA:10 a=Hbpc8ax9VmIgqBixU/K2CA==:117 X-Cloudmark-Score: 0 X-Authenticated-User: X-Originating-IP: 76.187.139.93 Received: from [76.187.139.93] ([76.187.139.93:63084] helo=[192.168.0.22]) by cdptpa-oedge04.mail.rr.com (envelope-from ) (ecelerity 2.2.3.46 r()) with ESMTP id E5/8A-11872-0BEBB035; Mon, 24 Feb 2014 21:50:40 +0000 From: Stacey Son Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable Subject: [RFC] TLB-based reference bit emulation (patches) Message-Id: Date: Mon, 24 Feb 2014 15:50:41 -0600 To: "freebsd-mips@freebsd.org" Mime-Version: 1.0 (Mac OS X Mail 6.6 \(1510\)) X-Mailer: Apple Mail (2.1510) X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 24 Feb 2014 21:50:48 -0000 Hi all: Below are some links to patches that adds TLB-based reference bit = emulation for MIPS hardware with 64-bit physical addressing. This is = similar to what is described in the paper "Page Replacement and = Reference Bit Emulation in Mach" by Richard P. Draves. However, unlike = the Mach implementation the reference bit (or actually a *not* = referenced bit) is in the page table entry (PTE) and not in separate = array somewhere else in memory. The reference bit is set (or actually = cleared) in the TLB miss handler. With a PTE reference bit it is now = possible to have a complete implementation of pmap_ts_referenced() and = to correctly determine if the address is "MINCORE_REFERENCED" in = pmap_mincore(). The first patch actually adds free lists (and pmap_free_zero_pages() and = pmap_add_delayed_free_list()). The second patch adds the (not) = reference bit changes for exception.S and pmap.c. Currently this change = only applies to MIPS with 64 bit physical addresses because there is no = room for another PTE bit with MIPS32. Does anyone have any ideas for = the MIPS32 case other than the way it was done in Mach? http://people.freebsd.org/~sson/mips/superpages/pmap_freelist_1.diff = http://people.freebsd.org/~sson/mips/superpages/pmap_reference_bit_2.diff Next up is pmap_copy() and superpages. Best Regards, -stacey.=