From owner-svn-src-stable-11@freebsd.org Sun Mar 25 01:47:18 2018 Return-Path: Delivered-To: svn-src-stable-11@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 8B907F61C11; Sun, 25 Mar 2018 01:47:18 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 393D26BC43; Sun, 25 Mar 2018 01:47:18 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 341F11779B; Sun, 25 Mar 2018 01:47:18 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w2P1lItu006578; Sun, 25 Mar 2018 01:47:18 GMT (envelope-from ian@FreeBSD.org) Received: (from ian@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w2P1lHB6006575; Sun, 25 Mar 2018 01:47:17 GMT (envelope-from ian@FreeBSD.org) Message-Id: <201803250147.w2P1lHB6006575@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: ian set sender to ian@FreeBSD.org using -f From: Ian Lepore Date: Sun, 25 Mar 2018 01:47:17 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r331519 - in stable/11/sys: arm/freescale/imx modules/imx/imx_spi X-SVN-Group: stable-11 X-SVN-Commit-Author: ian X-SVN-Commit-Paths: in stable/11/sys: arm/freescale/imx modules/imx/imx_spi X-SVN-Commit-Revision: 331519 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable-11@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for only the 11-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 25 Mar 2018 01:47:18 -0000 Author: ian Date: Sun Mar 25 01:47:17 2018 New Revision: 331519 URL: https://svnweb.freebsd.org/changeset/base/331519 Log: MFC r330437-r330438, r330440, r331045 r330437: Do not stop the loop that configures gpio chipselect pins on the first error, just ignore pins that don't configure and keep setting up the ones that do. (But when bootverbose is on, whine about the errors.) r330438: Defer attaching the spibus until timers and interrupts are working. The driver requires interrupts to do transfers, and the drivers for the SPI devices on the bus quite reasonably expect to be able to do IO while probing and attaching. r330440: Switch imx_gpio to attach at BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE. Pretty much any other device might need to manipulate a gpio pin during its probe or attach routines, so these devices must be available as early as possible. The gpio device is an interrupt controller, but I didn't choose the INTERRUPT pass for that reason (it works fine as an interrupt controller as long as it attaches any time before interrupts are enabled). That just looked like the right place in the passes to ensure that it attaches before any type of device that might need gpio pin manipulations. r331045: Add required interface header. Reported by: andreast@ Modified: stable/11/sys/arm/freescale/imx/imx_gpio.c stable/11/sys/arm/freescale/imx/imx_spi.c stable/11/sys/modules/imx/imx_spi/Makefile Modified: stable/11/sys/arm/freescale/imx/imx_gpio.c ============================================================================== --- stable/11/sys/arm/freescale/imx/imx_gpio.c Sun Mar 25 01:34:44 2018 (r331518) +++ stable/11/sys/arm/freescale/imx/imx_gpio.c Sun Mar 25 01:47:17 2018 (r331519) @@ -869,5 +869,5 @@ static driver_t imx51_gpio_driver = { }; static devclass_t imx51_gpio_devclass; -DRIVER_MODULE(imx51_gpio, simplebus, imx51_gpio_driver, imx51_gpio_devclass, - 0, 0); +EARLY_DRIVER_MODULE(imx51_gpio, simplebus, imx51_gpio_driver, + imx51_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE); Modified: stable/11/sys/arm/freescale/imx/imx_spi.c ============================================================================== --- stable/11/sys/arm/freescale/imx/imx_spi.c Sun Mar 25 01:34:44 2018 (r331518) +++ stable/11/sys/arm/freescale/imx/imx_spi.c Sun Mar 25 01:47:17 2018 (r331519) @@ -541,7 +541,7 @@ spi_attach(device_t dev) /* Allocate gpio pins for configured chip selects. */ node = ofw_bus_get_node(sc->dev); - for (err = 0, idx = 0; err == 0 && idx < nitems(sc->cspins); ++idx) { + for (idx = 0; idx < nitems(sc->cspins); ++idx) { err = gpio_pin_get_by_ofw_propidx(sc->dev, node, "cs-gpios", idx, &sc->cspins[idx]); if (err == 0) { @@ -558,9 +558,16 @@ spi_attach(device_t dev) */ WR4(sc, ECSPI_CTLREG, CTLREG_CMODES_MASTER); - /* Attach the bus driver. */ + /* + * Add the spibus driver as a child, and setup a one-shot intrhook to + * attach it after interrupts are working. It will attach actual SPI + * devices as its children, and those devices may need to do IO during + * their attach. We can't do IO until timers and interrupts are working. + */ sc->spibus = device_add_child(dev, "spibus", -1); - return (bus_generic_attach(sc->dev)); + config_intrhook_oneshot((ich_func_t)bus_generic_attach, dev); + + return (0); } static int Modified: stable/11/sys/modules/imx/imx_spi/Makefile ============================================================================== --- stable/11/sys/modules/imx/imx_spi/Makefile Sun Mar 25 01:34:44 2018 (r331518) +++ stable/11/sys/modules/imx/imx_spi/Makefile Sun Mar 25 01:47:17 2018 (r331519) @@ -9,6 +9,7 @@ SRCS= imx_spi.c SRCS+= \ bus_if.h \ device_if.h \ + gpio_if.h \ ofw_bus_if.h \ opt_platform.h \ spibus_if.h \