From owner-freebsd-hackers@FreeBSD.ORG Sat Dec 29 21:46:47 2007 Return-Path: Delivered-To: freebsd-hackers@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B825D16A419 for ; Sat, 29 Dec 2007 21:46:47 +0000 (UTC) (envelope-from peterjeremy@optushome.com.au) Received: from mail01.syd.optusnet.com.au (mail01.syd.optusnet.com.au [211.29.132.182]) by mx1.freebsd.org (Postfix) with ESMTP id 4C77E13C465 for ; Sat, 29 Dec 2007 21:46:47 +0000 (UTC) (envelope-from peterjeremy@optushome.com.au) Received: from server.vk2pj.dyndns.org (c220-239-20-82.belrs4.nsw.optusnet.com.au [220.239.20.82]) by mail01.syd.optusnet.com.au (8.13.1/8.13.1) with ESMTP id lBTLkjUV008231 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Sun, 30 Dec 2007 08:46:45 +1100 Received: from server.vk2pj.dyndns.org (localhost.vk2pj.dyndns.org [127.0.0.1]) by server.vk2pj.dyndns.org (8.14.2/8.14.1) with ESMTP id lBTLkiPE073613; Sun, 30 Dec 2007 08:46:44 +1100 (EST) (envelope-from peter@server.vk2pj.dyndns.org) Received: (from peter@localhost) by server.vk2pj.dyndns.org (8.14.2/8.14.2/Submit) id lBTLki8R073612; Sun, 30 Dec 2007 08:46:44 +1100 (EST) (envelope-from peter) Date: Sun, 30 Dec 2007 08:46:44 +1100 From: Peter Jeremy To: Erich Dollansky Message-ID: <20071229214644.GY40785@server.vk2pj.dyndns.org> References: <47760132.5040306@pacific.net.sg> <47761B63.4010407@pacific.net.sg> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="YZQs1kEQY307C4ut" Content-Disposition: inline In-Reply-To: <47761B63.4010407@pacific.net.sg> X-PGP-Key: http://members.optusnet.com.au/peterjeremy/pubkey.asc User-Agent: Mutt/1.5.17 (2007-11-01) Cc: freebsd-hackers@freebsd.org Subject: Re: Architectures with strict alignment? X-BeenThere: freebsd-hackers@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Technical Discussions relating to FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 29 Dec 2007 21:46:47 -0000 --YZQs1kEQY307C4ut Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sat, Dec 29, 2007 at 06:03:15PM +0800, Erich Dollansky wrote: >All RISC based designs need the alignment so that the CPU can fetch a CPU= =20 >word in one go. CISC based designs do not have this limitiation. It's more that the additional logic required to split a single memory operation (load/store) into multiple bus cycles is incompatible with the RISC philosophy (though the AMD29K could apparently generate dummy bus cycles to limit the number of bit transitions on any cycle to reduce the I/O load). Most CISC architectures either needed to support non-aligned accesses for compatibility with previous architectures (eg 8080->8086) or gained non-aligned access support when they were enhanced to support wider buses (eg M68K). >I also do not know of any other CISC based design which made it to=20 >mainstream. You might like to read http://jbayko.sasktelwebsite.net/cpu.html --=20 Peter Jeremy Please excuse any delays as the result of my ISP's inability to implement an MTA that is either RFC2821-compliant or matches their claimed behaviour. --YZQs1kEQY307C4ut Content-Type: application/pgp-signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.4 (FreeBSD) iD8DBQFHdsBE/opHv/APuIcRAgtpAKCze84MLqUkGHhWNrTO3rUOLwKo0wCgtY+j 3KQMBtquxYE7i2MwTCW9Kmg= =s+Sg -----END PGP SIGNATURE----- --YZQs1kEQY307C4ut--