From nobody Mon Feb 2 22:01:51 2026 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4f4gZ753n8z6Qc0V for ; Mon, 02 Feb 2026 22:01:51 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R13" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4f4gZ73cb5z4Ffg for ; Mon, 02 Feb 2026 22:01:51 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1770069711; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=hqEdHL3Il867TgAlghEY7C/n9w0N+Gkx6aMeFkhHRSM=; b=LAfLPnEmfCXMBLUu8EK2uFWjf5mZW/T4lnfRNK2mLeeKeoROC21Lxk4C6XxLOo1UhmdAzU kziDHBGaAqjeus4lrGZon3XMcId1a698k1yWZ3QoDqceDYGoniFnKr/4/D4/KpmEL03Byw xpiBIeyv8nWNcK+f0uqip9cKL/Nkxrgj9yaGgoWLkwtcDclAMPQhsdlAMdrtiWjiuy62dH x/FhJrtYDJmibrzT5vn4QNseL0fsuX3++N5JR1Xuvlb9PPZVomf/DjM70rfaiyFLBpmNZP ssa8Fae3GJzb8YeOTwgp+yautCV2oYsqyk4D9DDyKggMDbEfZpv7jmXo/HaqZw== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1770069711; a=rsa-sha256; cv=none; b=VRBgkzg4ZIwxXr/zxFucvt5p9VqeNjC/rT2jvIG/ylqYuB21acFxLycz2w9Tfqf3kNKw0O gjrOr/h3HUcu66ba2bPoelCul4SMCGja5nn0PzQW6teu6z/v5S3FbyBC8iem91YM3d25pS lG8Z1phjJl/7mDoe/NFRyt/4Pss+5gMm6DnWscSLo9i+GOCgdnUaMEr6uCyWhICEpxkiEz 66O7mtSuq/j3hnrArLdYfAzmPkH3Ekh0BWDLC8z9vzKdGXOOJF68XOAA0gfNW6vPCS//FO F1lHLmwSmRhKg7xh7k1aQpfbGWXgughXYV4sC1NtoRh4QnEvFk5OCtMApxyFTQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1770069711; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=hqEdHL3Il867TgAlghEY7C/n9w0N+Gkx6aMeFkhHRSM=; b=BwrR76nmVLOa/Le1YhRyMrG78/s12k6XIEm7E2e4QZmdS28unPDFD/upFFbR7PmXRG0v94 +RGIG+ZkiSWz960Dz2awHzTqbzt4dgiZzku920DOQCLTKVDNx4zjTI/MxD71lvA1aKDmGz TLla8NbYz408lssxN2XEpn+e9lbZfVsWoYdNAshtRnahNEzimleGfEqRpakEc3yWErJclT X0aJqdm2bBwHY/iFE/RxQxErOwKVzg4o3Pso30V7DwTwN6XFtsBhdSE2KsuaWtVJwW0RWs qgPGDEzR2ShmpOBw3l4GQVwMpEbkuCvdvHbFqY7iwr9TY96pIA+ScPDB8BNdfA== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4f4gZ73CF9zl22 for ; Mon, 02 Feb 2026 22:01:51 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 4439e by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Mon, 02 Feb 2026 22:01:51 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Marius Strobl Subject: git: bfbcd310bd49 - main - Revert "sym(4): Employ memory barriers also on x86" List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: marius X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: bfbcd310bd4997c4ddb21bb81d61f2f29c68937c Auto-Submitted: auto-generated Date: Mon, 02 Feb 2026 22:01:51 +0000 Message-Id: <69811ecf.4439e.6c2a24fc@gitrepo.freebsd.org> The branch main has been updated by marius: URL: https://cgit.FreeBSD.org/src/commit/?id=bfbcd310bd4997c4ddb21bb81d61f2f29c68937c commit bfbcd310bd4997c4ddb21bb81d61f2f29c68937c Author: Marius Strobl AuthorDate: 2026-01-28 21:20:42 +0000 Commit: Marius Strobl CommitDate: 2026-02-02 21:53:13 +0000 Revert "sym(4): Employ memory barriers also on x86" The problem will be avoided in a different way. This reverts commit e769bc77184312b6137a9b180c97b87c0760b849. --- sys/dev/sym/sym_hipd.c | 42 +++++++++++++++++++++++++++--------------- 1 file changed, 27 insertions(+), 15 deletions(-) diff --git a/sys/dev/sym/sym_hipd.c b/sys/dev/sym/sym_hipd.c index f78d595a73ce..0e51607fb07a 100644 --- a/sys/dev/sym/sym_hipd.c +++ b/sys/dev/sym/sym_hipd.c @@ -58,6 +58,7 @@ */ #include +#define SYM_DRIVER_NAME "sym-1.6.5-20000902" /* #define SYM_DEBUG_GENERIC_SUPPORT */ @@ -113,16 +114,27 @@ typedef u_int32_t u32; #include /* - * Architectures may implement weak ordering that requires memory barriers - * to be used for LOADS and STORES to become globally visible (and also IO - * barriers when they make sense). - */ -#ifdef __powerpc__ -#define MEMORY_READ_BARRIER() __asm__ volatile("eieio; sync" : : : "memory") -#define MEMORY_WRITE_BARRIER() MEMORY_READ_BARRIER() + * IA32 architecture does not reorder STORES and prevents + * LOADS from passing STORES. It is called `program order' + * by Intel and allows device drivers to deal with memory + * ordering by only ensuring that the code is not reordered + * by the compiler when ordering is required. + * Other architectures implement a weaker ordering that + * requires memory barriers (and also IO barriers when they + * make sense) to be used. + */ +#if defined __i386__ || defined __amd64__ +#define MEMORY_BARRIER() do { ; } while(0) +#elif defined __powerpc__ +#define MEMORY_BARRIER() __asm__ volatile("eieio; sync" : : : "memory") +#elif defined __arm__ +#define MEMORY_BARRIER() dmb() +#elif defined __aarch64__ +#define MEMORY_BARRIER() dmb(sy) +#elif defined __riscv +#define MEMORY_BARRIER() fence() #else -#define MEMORY_READ_BARRIER() rmb() -#define MEMORY_WRITE_BARRIER() wmb() +#error "Not supported platform" #endif /* @@ -880,13 +892,13 @@ struct sym_nvram { */ #define OUTL_DSP(v) \ do { \ - MEMORY_WRITE_BARRIER(); \ + MEMORY_BARRIER(); \ OUTL (nc_dsp, (v)); \ } while (0) #define OUTONB_STD() \ do { \ - MEMORY_WRITE_BARRIER(); \ + MEMORY_BARRIER(); \ OUTONB (nc_dcntl, (STD|NOCOM)); \ } while (0) @@ -2896,7 +2908,7 @@ static void sym_put_start_queue(hcb_p np, ccb_p cp) if (qidx >= MAX_QUEUE*2) qidx = 0; np->squeue [qidx] = cpu_to_scr(np->idletask_ba); - MEMORY_WRITE_BARRIER(); + MEMORY_BARRIER(); np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba); np->squeueput = qidx; @@ -2908,7 +2920,7 @@ static void sym_put_start_queue(hcb_p np, ccb_p cp) * Script processor may be waiting for reselect. * Wake it up. */ - MEMORY_WRITE_BARRIER(); + MEMORY_BARRIER(); OUTB (nc_istat, SIGP|np->istat_sem); } @@ -3049,7 +3061,7 @@ static int sym_wakeup_done (hcb_p np) cp = sym_ccb_from_dsa(np, dsa); if (cp) { - MEMORY_READ_BARRIER(); + MEMORY_BARRIER(); sym_complete_ok (np, cp); ++n; } else @@ -3847,7 +3859,7 @@ static void sym_intr1 (hcb_p np) * On paper, a memory barrier may be needed here. * And since we are paranoid ... :) */ - MEMORY_READ_BARRIER(); + MEMORY_BARRIER(); /* * First, interrupts we want to service cleanly.