Date: Tue, 16 Feb 1999 15:41:45 +0100 From: Roland Jesse <jesse@prinz-atm.CS.Uni-Magdeburg.De> To: freebsd-hackers@freebsd.org Subject: Makefile: >1 program without a single target each. Message-ID: <19990216154145.A1700@cs.uni-magdeburg.de>
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Hello,
Assumed, I have the source code for more than just one program in a
directory (because they share a couple source code files). How does
the Makefile has to / should look like?
Normally, I would do something like:
PROG= myprog
SRCS= myprog.c utils.c otherstuff.c
NOMAN= No manual page yet.
BINDIR= /usr/local/bin
.include <bsd.prog.mk>
This is passed to:
OBJS+= ${SRCS:N*.h:R:S/$/.o/g}
${PROG}: ${OBJS}
${CC} ${CFLAGS} ${LDFLAGS} -o ${.TARGET} ${OBJS} ${LDDESTDIR} ${LDADD}
But what do I do when the Makefile is supposed to handle more than
just one potential target? How do I specify the OBJS variable
depending on the different source files?
Scenario:
PROG1= myprog
PROG2= herprog
SRCS1= myprog.c utils.c otherstuff.c
SRCS2= herprog.c herprog.h utils.c otherstuff.c
NOMAN= No manual page yet.
BINDIR= /usr/local/bin
.include <bsd.prog.mk>
I do not want to specify the whole compilation line for each program
like in:
MYOBJS= myprog.o utils.o otherstuff.o
myprog: $(MYOBJS)
${CC} ${CFLAGS} ${LDFLAGS} -o ${.TARGET} $(MYOBJS) ${LDDESTDIR} ${LDADD}HEROBJS= herprog.o utils.o otherstuff.o
herprog: $(HEROBJS)
${CC} ${CFLAGS} ${LDFLAGS} -o ${.TARGET} $(HEROBJS) ${LDDESTDIR} ${LDADD}
Any ideas to get around the OBJS-problem are appreciated.
Roland
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