Date: Sat, 24 Oct 2009 14:46:40 -0700 From: Pyun YongHyeon <pyunyh@gmail.com> To: kalin m <kalin@el.net> Cc: freebsd-net@freebsd.org Subject: Re: Marvell 88E8057 Message-ID: <20091024214640.GE6050@michelle.cdnetworks.com> In-Reply-To: <4AE2780F.4080600@el.net> References: <4AE2780F.4080600@el.net>
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On Fri, Oct 23, 2009 at 11:44:15PM -0400, kalin m wrote:
>
> hi all..
>
> does anybody here know if freebsd has a driver for Marvell 88E8057 nic chip?
>
> according to the kernel list of drivers (7.2) marvell chips are driven
> by the msk driver. but it doesn't show up in pciconf, dmesg or
> sysinstall....
> strangely enough 88E8057 is not in the list in man msk. although 88E8056
> and 88E8058 are. is this just bad luck?!
>
I think 88E8057(Yukon Ultra 2) is the latest chipset from Marvell
and no one ever expressed his/her willingness to try experiment
patch. I guess msk(4) in HEAD has all required features to support
88E8057. Would you try attached patch?
The patch was generated against HEAD. If you have to use 7.2-RELEASE
copy the following files from HEAD and apply attached patch.
/usr/src/sys/dev/msk/if_msk.c
/usr/src/sys/dev/msk/if_mskreg.h
/usr/src/sys/dev/mii/miidevs
/usr/src/sys/dev/mii/e1000phy.c
/usr/src/sys/dev/mii/e1000phyreg.c
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Index: sys/dev/msk/if_msk.c
===================================================================
--- sys/dev/msk/if_msk.c (revision 198453)
+++ sys/dev/msk/if_msk.c (working copy)
@@ -221,6 +221,8 @@
"Marvell Yukon 88E8071 Gigabit Ethernet" },
{ VENDORID_MARVELL, DEVICEID_MRVL_436C,
"Marvell Yukon 88E8072 Gigabit Ethernet" },
+ { VENDORID_MARVELL, DEVICEID_MRVL_4380,
+ "Marvell Yukon 88E8057 Gigabit Ethernet" },
{ VENDORID_DLINK, DEVICEID_DLINK_DGE550SX,
"D-Link 550SX Gigabit Ethernet" },
{ VENDORID_DLINK, DEVICEID_DLINK_DGE560SX,
@@ -235,7 +237,9 @@
"Yukon EX",
"Yukon EC",
"Yukon FE",
- "Yukon FE+"
+ "Yukon FE+",
+ "Yukon Supreme",
+ "Yukon Ultra 2"
};
static int mskc_probe(device_t);
@@ -1142,6 +1146,7 @@
case CHIP_ID_YUKON_EC_U:
case CHIP_ID_YUKON_EX:
case CHIP_ID_YUKON_FE_P:
+ case CHIP_ID_YUKON_UL_2:
CSR_WRITE_2(sc, B0_CTST, Y2_HW_WOL_OFF);
/* Enable all clocks. */
@@ -1744,6 +1749,10 @@
sc->msk_clock = 156; /* 156 Mhz */
sc->msk_pflags |= MSK_FLAG_JUMBO;
break;
+ case CHIP_ID_YUKON_UL_2:
+ sc->msk_clock = 156; /* 156 Mhz */
+ sc->msk_pflags |= MSK_FLAG_JUMBO;
+ break;
default:
sc->msk_clock = 156; /* 156 Mhz */
break;
Index: sys/dev/msk/if_mskreg.h
===================================================================
--- sys/dev/msk/if_mskreg.h (revision 198453)
+++ sys/dev/msk/if_mskreg.h (working copy)
@@ -143,6 +143,7 @@
#define DEVICEID_MRVL_436A 0x436A
#define DEVICEID_MRVL_436B 0x436B
#define DEVICEID_MRVL_436C 0x436C
+#define DEVICEID_MRVL_4380 0x4380
/*
* D-Link gigabit ethernet device ID
@@ -890,6 +891,8 @@
#define CHIP_ID_YUKON_EC 0xb6 /* Chip ID for YUKON-2 EC */
#define CHIP_ID_YUKON_FE 0xb7 /* Chip ID for YUKON-2 FE */
#define CHIP_ID_YUKON_FE_P 0xb8 /* Chip ID for YUKON-2 FE+ */
+#define CHIP_ID_YUKON_SUPR 0xb9 /* Chip ID for YUKON-2 Supreme */
+#define CHIP_ID_YUKON_UL_2 0xba /* Chip ID for YUKON-2 Ultra 2 */
#define CHIP_REV_YU_XL_A0 0 /* Chip Rev. for Yukon-2 A0 */
#define CHIP_REV_YU_XL_A1 1 /* Chip Rev. for Yukon-2 A1 */
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