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Date:      Thu, 20 Apr 2017 21:19:11 +0000 (UTC)
From:      Dimitry Andric <dim@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org
Subject:   svn commit: r317218 - in vendor/llvm/dist: . bindings/go/llvm cmake/modules docs include/llvm include/llvm-c include/llvm/ADT include/llvm/Analysis include/llvm/Bitcode include/llvm/CodeGen include...
Message-ID:  <201704202119.v3KLJBM1001744@repo.freebsd.org>

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Author: dim
Date: Thu Apr 20 21:19:10 2017
New Revision: 317218
URL: https://svnweb.freebsd.org/changeset/base/317218

Log:
  Vendor import of llvm trunk r300890:
  https://llvm.org/svn/llvm-project/llvm/trunk@300890

Added:
  vendor/llvm/dist/lib/Fuzzer/test/CleanseTest.cpp   (contents, props changed)
  vendor/llvm/dist/lib/Fuzzer/test/cleanse.test
  vendor/llvm/dist/test/Analysis/ScalarEvolution/or-as-add.ll
  vendor/llvm/dist/test/Bitcode/DIExpression-aggresult.ll
  vendor/llvm/dist/test/Bitcode/DIExpression-aggresult.ll.bc   (contents, props changed)
  vendor/llvm/dist/test/Bitcode/DIExpression-deref.ll
  vendor/llvm/dist/test/Bitcode/DIExpression-deref.ll.bc   (contents, props changed)
  vendor/llvm/dist/test/CodeGen/AArch64/nonlazybind.ll
  vendor/llvm/dist/test/CodeGen/AMDGPU/frame-index-amdgiz.ll
  vendor/llvm/dist/test/CodeGen/AMDGPU/hsa-func-align.ll
  vendor/llvm/dist/test/CodeGen/ARM/darwin-tls-preserved.ll
  vendor/llvm/dist/test/CodeGen/ARM/divmod-hwdiv.ll
  vendor/llvm/dist/test/CodeGen/ARM/fpoffset_overflow.mir
  vendor/llvm/dist/test/CodeGen/Hexagon/addrmode-globoff.mir
  vendor/llvm/dist/test/CodeGen/Mips/msa/shift_constant_pool.ll
  vendor/llvm/dist/test/CodeGen/Mips/msa/shift_no_and.ll
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/binop.ll
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/legalize-constant.mir
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/legalize-trunc.mir
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/memop.ll
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-add.mir
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-frameIndex.mir
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-memop.mir
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-sub.mir
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-trunc.mir
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/trunc.ll
  vendor/llvm/dist/test/CodeGen/X86/bswap_tree.ll
  vendor/llvm/dist/test/CodeGen/X86/bswap_tree2.ll
  vendor/llvm/dist/test/CodeGen/X86/dbg-baseptr.ll
  vendor/llvm/dist/test/CodeGen/X86/fp128-extract.ll
  vendor/llvm/dist/test/CodeGen/X86/sse-schedule.ll
  vendor/llvm/dist/test/CodeGen/X86/sse2-schedule.ll
  vendor/llvm/dist/test/CodeGen/X86/tail-merge-after-mbp.mir
  vendor/llvm/dist/test/DebugInfo/AMDGPU/code-pointer-size.ll
  vendor/llvm/dist/test/DebugInfo/AMDGPU/dwarfdump-relocs.ll
  vendor/llvm/dist/test/DebugInfo/X86/fi-expr.ll
  vendor/llvm/dist/test/MC/ARM/assembly-default-build-attributes.s   (contents, props changed)
  vendor/llvm/dist/test/Transforms/CodeGenPrepare/split-indirect-loop.ll
  vendor/llvm/dist/test/Transforms/GVN/non-integral-pointers.ll
  vendor/llvm/dist/test/Transforms/InstCombine/call-cast-attrs.ll
  vendor/llvm/dist/test/Transforms/InstCombine/pr32686.ll
  vendor/llvm/dist/test/Transforms/InstSimplify/icmp-ranges.ll
  vendor/llvm/dist/test/Transforms/LoopUnroll/peel-loop-negative.ll
  vendor/llvm/dist/test/Transforms/NewGVN/non-integral-pointers.ll
  vendor/llvm/dist/test/Transforms/SLPVectorizer/X86/reorder_phi.ll
  vendor/llvm/dist/test/Transforms/StructurizeCFG/invert-compare.ll
  vendor/llvm/dist/test/tools/llvm-symbolizer/padding-x86_64.ll
  vendor/llvm/dist/test/tools/llvm-xray/X86/extract-instrmap-symbolize.ll
  vendor/llvm/dist/tools/llvm-shlib/simple_version_script.map.in   (contents, props changed)
  vendor/llvm/dist/unittests/CodeGen/ScalableVectorMVTsTest.cpp   (contents, props changed)
Deleted:
  vendor/llvm/dist/test/CodeGen/AVR/inline-asm/multibyte.ll
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/binop-isel.ll
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/frameIndex-instructionselect.mir
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/legalize-const.mir
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/memop-isel.ll
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/x86_64-instructionselect.mir
  vendor/llvm/dist/test/CodeGen/X86/tail-merge-after-mbp.ll
  vendor/llvm/dist/test/DebugInfo/AMDGPU/pointer-address-space-dwarf-v1.ll
  vendor/llvm/dist/test/DebugInfo/AMDGPU/variable-locations-dwarf-v1.ll
  vendor/llvm/dist/test/Transforms/InstCombine/2008-01-13-NoBitCastAttributes.ll
Modified:
  vendor/llvm/dist/CMakeLists.txt
  vendor/llvm/dist/bindings/go/llvm/DIBuilderBindings.cpp
  vendor/llvm/dist/bindings/go/llvm/IRBindings.h
  vendor/llvm/dist/cmake/modules/AddLLVM.cmake
  vendor/llvm/dist/docs/BitCodeFormat.rst
  vendor/llvm/dist/docs/LangRef.rst
  vendor/llvm/dist/docs/SourceLevelDebugging.rst
  vendor/llvm/dist/docs/Statepoints.rst
  vendor/llvm/dist/include/llvm-c/Core.h
  vendor/llvm/dist/include/llvm-c/Types.h
  vendor/llvm/dist/include/llvm/ADT/APInt.h
  vendor/llvm/dist/include/llvm/ADT/BitVector.h
  vendor/llvm/dist/include/llvm/ADT/SmallBitVector.h
  vendor/llvm/dist/include/llvm/Analysis/BlockFrequencyInfoImpl.h
  vendor/llvm/dist/include/llvm/Analysis/DominanceFrontierImpl.h
  vendor/llvm/dist/include/llvm/Analysis/LoopInfo.h
  vendor/llvm/dist/include/llvm/Analysis/LoopInfoImpl.h
  vendor/llvm/dist/include/llvm/Analysis/MemoryBuiltins.h
  vendor/llvm/dist/include/llvm/Analysis/ScalarEvolution.h
  vendor/llvm/dist/include/llvm/Bitcode/BitcodeReader.h
  vendor/llvm/dist/include/llvm/Bitcode/BitcodeWriter.h
  vendor/llvm/dist/include/llvm/Bitcode/LLVMBitCodes.h
  vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
  vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/Utils.h
  vendor/llvm/dist/include/llvm/CodeGen/MachineInstrBuilder.h
  vendor/llvm/dist/include/llvm/CodeGen/MachineValueType.h
  vendor/llvm/dist/include/llvm/CodeGen/ValueTypes.h
  vendor/llvm/dist/include/llvm/CodeGen/ValueTypes.td
  vendor/llvm/dist/include/llvm/Config/config.h.cmake
  vendor/llvm/dist/include/llvm/DebugInfo/DWARF/DWARFDie.h
  vendor/llvm/dist/include/llvm/DebugInfo/DWARF/DWARFUnit.h
  vendor/llvm/dist/include/llvm/IR/Argument.h
  vendor/llvm/dist/include/llvm/IR/Attributes.h
  vendor/llvm/dist/include/llvm/IR/ConstantRange.h
  vendor/llvm/dist/include/llvm/IR/DIBuilder.h
  vendor/llvm/dist/include/llvm/IR/DebugInfoMetadata.h
  vendor/llvm/dist/include/llvm/IR/Instructions.h
  vendor/llvm/dist/include/llvm/IR/Metadata.h
  vendor/llvm/dist/include/llvm/IR/ModuleSummaryIndex.h
  vendor/llvm/dist/include/llvm/IR/PatternMatch.h
  vendor/llvm/dist/include/llvm/IR/Use.h
  vendor/llvm/dist/include/llvm/MC/MCAsmInfo.h
  vendor/llvm/dist/include/llvm/MC/MCStreamer.h
  vendor/llvm/dist/include/llvm/MC/MCSubtargetInfo.h
  vendor/llvm/dist/include/llvm/Object/Archive.h
  vendor/llvm/dist/include/llvm/Object/Binary.h
  vendor/llvm/dist/include/llvm/Object/COFF.h
  vendor/llvm/dist/include/llvm/Object/IRSymtab.h
  vendor/llvm/dist/include/llvm/Object/ObjectFile.h
  vendor/llvm/dist/include/llvm/Object/SymbolicFile.h
  vendor/llvm/dist/include/llvm/ObjectYAML/DWARFYAML.h
  vendor/llvm/dist/include/llvm/PassSupport.h
  vendor/llvm/dist/include/llvm/Support/ARMTargetParser.def
  vendor/llvm/dist/include/llvm/Support/ArrayRecycler.h
  vendor/llvm/dist/include/llvm/Support/BinaryStreamArray.h
  vendor/llvm/dist/include/llvm/Support/Dwarf.def
  vendor/llvm/dist/include/llvm/Support/Dwarf.h
  vendor/llvm/dist/include/llvm/Support/GenericDomTree.h
  vendor/llvm/dist/include/llvm/Support/GraphWriter.h
  vendor/llvm/dist/include/llvm/Support/LowLevelTypeImpl.h
  vendor/llvm/dist/include/llvm/Support/MathExtras.h
  vendor/llvm/dist/include/llvm/Support/Recycler.h
  vendor/llvm/dist/include/llvm/Support/Regex.h
  vendor/llvm/dist/include/llvm/Support/TargetParser.h
  vendor/llvm/dist/include/llvm/TableGen/StringToOffsetTable.h
  vendor/llvm/dist/include/llvm/Target/TargetLowering.h
  vendor/llvm/dist/include/llvm/Transforms/Utils/CodeExtractor.h
  vendor/llvm/dist/include/llvm/XRay/InstrumentationMap.h
  vendor/llvm/dist/lib/Analysis/BasicAliasAnalysis.cpp
  vendor/llvm/dist/lib/Analysis/BranchProbabilityInfo.cpp
  vendor/llvm/dist/lib/Analysis/CFLGraph.h
  vendor/llvm/dist/lib/Analysis/InstructionSimplify.cpp
  vendor/llvm/dist/lib/Analysis/MemoryBuiltins.cpp
  vendor/llvm/dist/lib/Analysis/MemorySSA.cpp
  vendor/llvm/dist/lib/Analysis/ScalarEvolution.cpp
  vendor/llvm/dist/lib/Analysis/ValueTracking.cpp
  vendor/llvm/dist/lib/AsmParser/LLParser.cpp
  vendor/llvm/dist/lib/Bitcode/Reader/BitcodeReader.cpp
  vendor/llvm/dist/lib/Bitcode/Reader/MetadataLoader.cpp
  vendor/llvm/dist/lib/Bitcode/Reader/MetadataLoader.h
  vendor/llvm/dist/lib/Bitcode/Writer/BitcodeWriter.cpp
  vendor/llvm/dist/lib/Bitcode/Writer/LLVMBuild.txt
  vendor/llvm/dist/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
  vendor/llvm/dist/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
  vendor/llvm/dist/lib/CodeGen/AsmPrinter/DIE.cpp
  vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
  vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
  vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
  vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfExpression.h
  vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
  vendor/llvm/dist/lib/CodeGen/CodeGenPrepare.cpp
  vendor/llvm/dist/lib/CodeGen/GlobalISel/IRTranslator.cpp
  vendor/llvm/dist/lib/CodeGen/GlobalISel/InstructionSelector.cpp
  vendor/llvm/dist/lib/CodeGen/GlobalISel/Legalizer.cpp
  vendor/llvm/dist/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  vendor/llvm/dist/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
  vendor/llvm/dist/lib/CodeGen/GlobalISel/Utils.cpp
  vendor/llvm/dist/lib/CodeGen/InlineSpiller.cpp
  vendor/llvm/dist/lib/CodeGen/LowLevelType.cpp
  vendor/llvm/dist/lib/CodeGen/MachineInstr.cpp
  vendor/llvm/dist/lib/CodeGen/MachineVerifier.cpp
  vendor/llvm/dist/lib/CodeGen/RegAllocFast.cpp
  vendor/llvm/dist/lib/CodeGen/SafeStack.cpp
  vendor/llvm/dist/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  vendor/llvm/dist/lib/CodeGen/SelectionDAG/FastISel.cpp
  vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
  vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
  vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeTypes.h
  vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
  vendor/llvm/dist/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  vendor/llvm/dist/lib/DebugInfo/DWARF/DWARFContext.cpp
  vendor/llvm/dist/lib/DebugInfo/DWARF/DWARFDie.cpp
  vendor/llvm/dist/lib/DebugInfo/DWARF/DWARFUnit.cpp
  vendor/llvm/dist/lib/ExecutionEngine/Interpreter/Execution.cpp
  vendor/llvm/dist/lib/Fuzzer/FuzzerDriver.cpp
  vendor/llvm/dist/lib/Fuzzer/FuzzerFlags.def
  vendor/llvm/dist/lib/Fuzzer/FuzzerLoop.cpp
  vendor/llvm/dist/lib/Fuzzer/FuzzerOptions.h
  vendor/llvm/dist/lib/Fuzzer/test/CMakeLists.txt
  vendor/llvm/dist/lib/Fuzzer/test/fuzzer-oom.test
  vendor/llvm/dist/lib/IR/Attributes.cpp
  vendor/llvm/dist/lib/IR/ConstantFold.cpp
  vendor/llvm/dist/lib/IR/ConstantRange.cpp
  vendor/llvm/dist/lib/IR/Constants.cpp
  vendor/llvm/dist/lib/IR/Core.cpp
  vendor/llvm/dist/lib/IR/DataLayout.cpp
  vendor/llvm/dist/lib/IR/Function.cpp
  vendor/llvm/dist/lib/IR/Instructions.cpp
  vendor/llvm/dist/lib/MC/MCDwarf.cpp
  vendor/llvm/dist/lib/MC/MCParser/AsmParser.cpp
  vendor/llvm/dist/lib/Object/Archive.cpp
  vendor/llvm/dist/lib/Object/Binary.cpp
  vendor/llvm/dist/lib/Object/COFFObjectFile.cpp
  vendor/llvm/dist/lib/Object/IRSymtab.cpp
  vendor/llvm/dist/lib/Object/ObjectFile.cpp
  vendor/llvm/dist/lib/Object/SymbolicFile.cpp
  vendor/llvm/dist/lib/Support/APFloat.cpp
  vendor/llvm/dist/lib/Support/APInt.cpp
  vendor/llvm/dist/lib/Support/CommandLine.cpp
  vendor/llvm/dist/lib/Support/Dwarf.cpp
  vendor/llvm/dist/lib/Support/LowLevelType.cpp
  vendor/llvm/dist/lib/Support/Regex.cpp
  vendor/llvm/dist/lib/Support/TargetParser.cpp
  vendor/llvm/dist/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  vendor/llvm/dist/lib/Target/AArch64/AArch64ISelLowering.cpp
  vendor/llvm/dist/lib/Target/AArch64/AArch64ISelLowering.h
  vendor/llvm/dist/lib/Target/AArch64/AArch64InstrInfo.td
  vendor/llvm/dist/lib/Target/AArch64/AArch64InstructionSelector.cpp
  vendor/llvm/dist/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
  vendor/llvm/dist/lib/Target/AArch64/AArch64SchedFalkorDetails.td
  vendor/llvm/dist/lib/Target/AArch64/AArch64Subtarget.cpp
  vendor/llvm/dist/lib/Target/AArch64/AArch64Subtarget.h
  vendor/llvm/dist/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  vendor/llvm/dist/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
  vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
  vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
  vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUSubtarget.h
  vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
  vendor/llvm/dist/lib/Target/AMDGPU/DSInstructions.td
  vendor/llvm/dist/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
  vendor/llvm/dist/lib/Target/AMDGPU/SIISelLowering.cpp
  vendor/llvm/dist/lib/Target/AMDGPU/SIMachineFunctionInfo.h
  vendor/llvm/dist/lib/Target/AMDGPU/SIRegisterInfo.cpp
  vendor/llvm/dist/lib/Target/ARM/ARM.td
  vendor/llvm/dist/lib/Target/ARM/ARMAsmPrinter.cpp
  vendor/llvm/dist/lib/Target/ARM/ARMBaseInstrInfo.h
  vendor/llvm/dist/lib/Target/ARM/ARMCallingConv.td
  vendor/llvm/dist/lib/Target/ARM/ARMConstantIslandPass.cpp
  vendor/llvm/dist/lib/Target/ARM/ARMFastISel.cpp
  vendor/llvm/dist/lib/Target/ARM/ARMFrameLowering.cpp
  vendor/llvm/dist/lib/Target/ARM/ARMISelDAGToDAG.cpp
  vendor/llvm/dist/lib/Target/ARM/ARMISelLowering.cpp
  vendor/llvm/dist/lib/Target/ARM/ARMISelLowering.h
  vendor/llvm/dist/lib/Target/ARM/ARMInstrInfo.td
  vendor/llvm/dist/lib/Target/ARM/ARMInstrNEON.td
  vendor/llvm/dist/lib/Target/ARM/ARMInstrThumb2.td
  vendor/llvm/dist/lib/Target/ARM/ARMInstructionSelector.cpp
  vendor/llvm/dist/lib/Target/ARM/ARMLegalizerInfo.cpp
  vendor/llvm/dist/lib/Target/ARM/ARMRegisterBankInfo.cpp
  vendor/llvm/dist/lib/Target/ARM/ARMSubtarget.h
  vendor/llvm/dist/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  vendor/llvm/dist/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
  vendor/llvm/dist/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
  vendor/llvm/dist/lib/Target/ARM/Thumb1FrameLowering.cpp
  vendor/llvm/dist/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
  vendor/llvm/dist/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h
  vendor/llvm/dist/lib/Target/Hexagon/BitTracker.cpp
  vendor/llvm/dist/lib/Target/Hexagon/BitTracker.h
  vendor/llvm/dist/lib/Target/Hexagon/HexagonISelLowering.cpp
  vendor/llvm/dist/lib/Target/Hexagon/HexagonISelLowering.h
  vendor/llvm/dist/lib/Target/Hexagon/HexagonOptAddrMode.cpp
  vendor/llvm/dist/lib/Target/Hexagon/HexagonTargetMachine.cpp
  vendor/llvm/dist/lib/Target/Hexagon/RDFCopy.cpp
  vendor/llvm/dist/lib/Target/Hexagon/RDFGraph.h
  vendor/llvm/dist/lib/Target/Hexagon/RDFRegisters.cpp
  vendor/llvm/dist/lib/Target/Hexagon/RDFRegisters.h
  vendor/llvm/dist/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp
  vendor/llvm/dist/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
  vendor/llvm/dist/lib/Target/Mips/MipsMSAInstrInfo.td
  vendor/llvm/dist/lib/Target/Mips/MipsSEISelLowering.cpp
  vendor/llvm/dist/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp
  vendor/llvm/dist/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
  vendor/llvm/dist/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
  vendor/llvm/dist/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  vendor/llvm/dist/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp
  vendor/llvm/dist/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
  vendor/llvm/dist/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
  vendor/llvm/dist/lib/Target/SystemZ/SystemZISelLowering.cpp
  vendor/llvm/dist/lib/Target/SystemZ/SystemZISelLowering.h
  vendor/llvm/dist/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp
  vendor/llvm/dist/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCCodeEmitter.cpp
  vendor/llvm/dist/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
  vendor/llvm/dist/lib/Target/WebAssembly/known_gcc_test_failures.txt
  vendor/llvm/dist/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
  vendor/llvm/dist/lib/Target/X86/X86FrameLowering.cpp
  vendor/llvm/dist/lib/Target/X86/X86ISelDAGToDAG.cpp
  vendor/llvm/dist/lib/Target/X86/X86ISelLowering.cpp
  vendor/llvm/dist/lib/Target/X86/X86ISelLowering.h
  vendor/llvm/dist/lib/Target/X86/X86InstructionSelector.cpp
  vendor/llvm/dist/lib/Target/X86/X86RegisterBankInfo.cpp
  vendor/llvm/dist/lib/Target/X86/X86RegisterInfo.h
  vendor/llvm/dist/lib/Target/X86/X86RegisterInfo.td
  vendor/llvm/dist/lib/Transforms/IPO/DeadArgumentElimination.cpp
  vendor/llvm/dist/lib/Transforms/IPO/FunctionAttrs.cpp
  vendor/llvm/dist/lib/Transforms/IPO/GlobalOpt.cpp
  vendor/llvm/dist/lib/Transforms/IPO/SampleProfile.cpp
  vendor/llvm/dist/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
  vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineAddSub.cpp
  vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
  vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCalls.cpp
  vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCasts.cpp
  vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCompares.cpp
  vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
  vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
  vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineSelect.cpp
  vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineShifts.cpp
  vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
  vendor/llvm/dist/lib/Transforms/InstCombine/InstructionCombining.cpp
  vendor/llvm/dist/lib/Transforms/Instrumentation/AddressSanitizer.cpp
  vendor/llvm/dist/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
  vendor/llvm/dist/lib/Transforms/Scalar/GVNHoist.cpp
  vendor/llvm/dist/lib/Transforms/Scalar/LoopLoadElimination.cpp
  vendor/llvm/dist/lib/Transforms/Scalar/LoopRerollPass.cpp
  vendor/llvm/dist/lib/Transforms/Scalar/NewGVN.cpp
  vendor/llvm/dist/lib/Transforms/Scalar/StructurizeCFG.cpp
  vendor/llvm/dist/lib/Transforms/Utils/CmpInstAnalysis.cpp
  vendor/llvm/dist/lib/Transforms/Utils/CodeExtractor.cpp
  vendor/llvm/dist/lib/Transforms/Utils/LCSSA.cpp
  vendor/llvm/dist/lib/Transforms/Utils/Local.cpp
  vendor/llvm/dist/lib/Transforms/Utils/LoopUnrollPeel.cpp
  vendor/llvm/dist/lib/Transforms/Utils/SimplifyCFG.cpp
  vendor/llvm/dist/lib/Transforms/Utils/VNCoercion.cpp
  vendor/llvm/dist/lib/Transforms/Vectorize/LoopVectorize.cpp
  vendor/llvm/dist/lib/Transforms/Vectorize/SLPVectorizer.cpp
  vendor/llvm/dist/test/Analysis/BranchProbabilityInfo/basic.ll
  vendor/llvm/dist/test/Analysis/DivergenceAnalysis/AMDGPU/kernel-args.ll
  vendor/llvm/dist/test/Bitcode/thinlto-alias.ll
  vendor/llvm/dist/test/Bitcode/thinlto-function-summary-callgraph-pgo.ll
  vendor/llvm/dist/test/Bitcode/thinlto-function-summary-callgraph-profile-summary.ll
  vendor/llvm/dist/test/Bitcode/thinlto-function-summary-callgraph.ll
  vendor/llvm/dist/test/Bitcode/thinlto-function-summary-originalnames.ll
  vendor/llvm/dist/test/Bitcode/thinlto-function-summary-refgraph.ll
  vendor/llvm/dist/test/Bitcode/thinlto-function-summary.ll
  vendor/llvm/dist/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
  vendor/llvm/dist/test/CodeGen/AArch64/arm64-abi.ll
  vendor/llvm/dist/test/CodeGen/AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll
  vendor/llvm/dist/test/CodeGen/AMDGPU/code-object-metadata-from-llvm-ir-full.ll
  vendor/llvm/dist/test/CodeGen/AMDGPU/exceed-max-sgprs.ll
  vendor/llvm/dist/test/CodeGen/AMDGPU/flat-scratch-reg.ll
  vendor/llvm/dist/test/CodeGen/AMDGPU/hsa-func.ll
  vendor/llvm/dist/test/CodeGen/AMDGPU/loop_break.ll
  vendor/llvm/dist/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
  vendor/llvm/dist/test/CodeGen/AMDGPU/nested-loop-conditions.ll
  vendor/llvm/dist/test/CodeGen/AMDGPU/ret_jump.ll
  vendor/llvm/dist/test/CodeGen/AMDGPU/select-vectors.ll
  vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
  vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
  vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-isel.ll
  vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-legalizer.mir
  vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
  vendor/llvm/dist/test/CodeGen/ARM/alloc-no-stack-realign.ll
  vendor/llvm/dist/test/CodeGen/ARM/build-attributes.ll
  vendor/llvm/dist/test/CodeGen/ARM/memcpy-inline.ll
  vendor/llvm/dist/test/CodeGen/ARM/memset-inline.ll
  vendor/llvm/dist/test/CodeGen/ARM/vbits.ll
  vendor/llvm/dist/test/CodeGen/ARM/vector-load.ll
  vendor/llvm/dist/test/CodeGen/ARM/vector-store.ll
  vendor/llvm/dist/test/CodeGen/ARM/vlddup.ll
  vendor/llvm/dist/test/CodeGen/ARM/vldlane.ll
  vendor/llvm/dist/test/CodeGen/ARM/vtbl.ll
  vendor/llvm/dist/test/CodeGen/AVR/alloca.ll
  vendor/llvm/dist/test/CodeGen/AVR/call.ll
  vendor/llvm/dist/test/CodeGen/AVR/directmem.ll
  vendor/llvm/dist/test/CodeGen/AVR/varargs.ll
  vendor/llvm/dist/test/CodeGen/PowerPC/andc.ll
  vendor/llvm/dist/test/CodeGen/WebAssembly/returned.ll
  vendor/llvm/dist/test/CodeGen/X86/GlobalISel/X86-regbankselect.mir
  vendor/llvm/dist/test/CodeGen/X86/MergeConsecutiveStores.ll
  vendor/llvm/dist/test/CodeGen/X86/avx-logic.ll
  vendor/llvm/dist/test/CodeGen/X86/avx512-ext.ll
  vendor/llvm/dist/test/CodeGen/X86/avx512-mask-op.ll
  vendor/llvm/dist/test/CodeGen/X86/combine-or.ll
  vendor/llvm/dist/test/CodeGen/X86/extract-store.ll
  vendor/llvm/dist/test/CodeGen/X86/i64-to-float.ll
  vendor/llvm/dist/test/CodeGen/X86/known-signbits-vector.ll
  vendor/llvm/dist/test/CodeGen/X86/madd.ll
  vendor/llvm/dist/test/CodeGen/X86/merge_store.ll
  vendor/llvm/dist/test/CodeGen/X86/vector-rotate-128.ll
  vendor/llvm/dist/test/CodeGen/X86/vector-rotate-256.ll
  vendor/llvm/dist/test/CodeGen/X86/x86-16.ll
  vendor/llvm/dist/test/DebugInfo/AMDGPU/variable-locations.ll
  vendor/llvm/dist/test/DebugInfo/ARM/selectiondag-deadcode.ll
  vendor/llvm/dist/test/DebugInfo/Generic/block-asan.ll
  vendor/llvm/dist/test/DebugInfo/X86/dbg-declare-arg.ll
  vendor/llvm/dist/test/DebugInfo/X86/dbg_value_direct.ll
  vendor/llvm/dist/test/DebugInfo/X86/debug-info-block-captured-self.ll
  vendor/llvm/dist/test/DebugInfo/X86/dw_op_minus.ll
  vendor/llvm/dist/test/DebugInfo/X86/dw_op_minus_direct.ll
  vendor/llvm/dist/test/DebugInfo/X86/sret.ll
  vendor/llvm/dist/test/Instrumentation/AddressSanitizer/debug_info.ll
  vendor/llvm/dist/test/Instrumentation/SanitizerCoverage/coverage.ll
  vendor/llvm/dist/test/Instrumentation/SanitizerCoverage/tracing.ll
  vendor/llvm/dist/test/MC/AArch64/basic-a64-diagnostics.s
  vendor/llvm/dist/test/MC/AMDGPU/gfx7_asm_all.s
  vendor/llvm/dist/test/MC/AMDGPU/gfx8_asm_all.s
  vendor/llvm/dist/test/MC/ARM/multi-section-mapping.s
  vendor/llvm/dist/test/TableGen/intrinsic-long-name.td
  vendor/llvm/dist/test/TableGen/intrinsic-varargs.td
  vendor/llvm/dist/test/ThinLTO/X86/autoupgrade.ll
  vendor/llvm/dist/test/ThinLTO/X86/distributed_indexes.ll
  vendor/llvm/dist/test/Transforms/InstCombine/amdgcn-demanded-vector-elts.ll
  vendor/llvm/dist/test/Transforms/InstCombine/constant-fold-math.ll
  vendor/llvm/dist/test/Transforms/InstCombine/div-shift.ll
  vendor/llvm/dist/test/Transforms/InstCombine/div.ll
  vendor/llvm/dist/test/Transforms/InstCombine/rem.ll
  vendor/llvm/dist/test/Transforms/InstCombine/shift.ll
  vendor/llvm/dist/test/Transforms/InstCombine/vector-casts.ll
  vendor/llvm/dist/test/Transforms/InstSimplify/AndOrXor.ll
  vendor/llvm/dist/test/Transforms/InstSimplify/shufflevector.ll
  vendor/llvm/dist/test/Transforms/InstSimplify/vector_gep.ll
  vendor/llvm/dist/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll
  vendor/llvm/dist/test/Transforms/LoopUnroll/peel-loop-not-forced.ll
  vendor/llvm/dist/test/Transforms/PhaseOrdering/globalaa-retained.ll
  vendor/llvm/dist/test/Transforms/SafeStack/X86/debug-loc.ll
  vendor/llvm/dist/test/Transforms/SampleProfile/Inputs/indirect-call.prof
  vendor/llvm/dist/test/Transforms/SampleProfile/indirect-call.ll
  vendor/llvm/dist/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll
  vendor/llvm/dist/test/Transforms/StructurizeCFG/post-order-traversal-bug.ll
  vendor/llvm/dist/test/tools/gold/X86/thinlto.ll
  vendor/llvm/dist/test/tools/llvm-lto/thinlto.ll
  vendor/llvm/dist/test/tools/llvm-symbolizer/Inputs/discrim
  vendor/llvm/dist/test/tools/llvm-symbolizer/Inputs/discrim.c
  vendor/llvm/dist/test/tools/llvm-symbolizer/Inputs/discrim.inp
  vendor/llvm/dist/test/tools/llvm-symbolizer/sym-verbose.test
  vendor/llvm/dist/test/tools/llvm-xray/X86/extract-instrmap.ll
  vendor/llvm/dist/tools/dsymutil/DwarfLinker.cpp
  vendor/llvm/dist/tools/llvm-bcanalyzer/llvm-bcanalyzer.cpp
  vendor/llvm/dist/tools/llvm-cat/llvm-cat.cpp
  vendor/llvm/dist/tools/llvm-modextract/llvm-modextract.cpp
  vendor/llvm/dist/tools/llvm-shlib/CMakeLists.txt
  vendor/llvm/dist/tools/llvm-xray/xray-extract.cc
  vendor/llvm/dist/unittests/ADT/APIntTest.cpp
  vendor/llvm/dist/unittests/ADT/BitVectorTest.cpp
  vendor/llvm/dist/unittests/Analysis/ScalarEvolutionTest.cpp
  vendor/llvm/dist/unittests/CodeGen/CMakeLists.txt
  vendor/llvm/dist/unittests/CodeGen/LowLevelTypeTest.cpp
  vendor/llvm/dist/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp
  vendor/llvm/dist/unittests/IR/AttributesTest.cpp
  vendor/llvm/dist/unittests/IR/ConstantRangeTest.cpp
  vendor/llvm/dist/unittests/Support/MathExtrasTest.cpp
  vendor/llvm/dist/unittests/Support/TargetParserTest.cpp
  vendor/llvm/dist/unittests/Transforms/Utils/Cloning.cpp
  vendor/llvm/dist/utils/TableGen/CodeGenTarget.cpp
  vendor/llvm/dist/utils/TableGen/IntrinsicEmitter.cpp

Modified: vendor/llvm/dist/CMakeLists.txt
==============================================================================
--- vendor/llvm/dist/CMakeLists.txt	Thu Apr 20 21:04:21 2017	(r317217)
+++ vendor/llvm/dist/CMakeLists.txt	Thu Apr 20 21:19:10 2017	(r317218)
@@ -512,6 +512,9 @@ set(LLVM_INSTALL_OCAMLDOC_HTML_DIR "shar
 option (LLVM_BUILD_EXTERNAL_COMPILER_RT
   "Build compiler-rt as an external project." OFF)
 
+option (LLVM_VERSION_PRINTER_SHOW_HOST_TARGET_INFO
+  "Show target and host info when tools are invoked with --version." ON)
+
 # You can configure which libraries from LLVM you want to include in the
 # shared library by setting LLVM_DYLIB_COMPONENTS to a semi-colon delimited
 # list of LLVM components. All component names handled by llvm-config are valid.

Modified: vendor/llvm/dist/bindings/go/llvm/DIBuilderBindings.cpp
==============================================================================
--- vendor/llvm/dist/bindings/go/llvm/DIBuilderBindings.cpp	Thu Apr 20 21:04:21 2017	(r317217)
+++ vendor/llvm/dist/bindings/go/llvm/DIBuilderBindings.cpp	Thu Apr 20 21:19:10 2017	(r317218)
@@ -19,8 +19,6 @@
 
 using namespace llvm;
 
-DEFINE_SIMPLE_CONVERSION_FUNCTIONS(DIBuilder, LLVMDIBuilderRef)
-
 LLVMDIBuilderRef LLVMNewDIBuilder(LLVMModuleRef mref) {
   Module *m = unwrap(mref);
   return wrap(new DIBuilder(*m));

Modified: vendor/llvm/dist/bindings/go/llvm/IRBindings.h
==============================================================================
--- vendor/llvm/dist/bindings/go/llvm/IRBindings.h	Thu Apr 20 21:04:21 2017	(r317217)
+++ vendor/llvm/dist/bindings/go/llvm/IRBindings.h	Thu Apr 20 21:19:10 2017	(r317218)
@@ -26,7 +26,6 @@
 extern "C" {
 #endif
 
-typedef struct LLVMOpaqueMetadata *LLVMMetadataRef;
 struct LLVMDebugLocMetadata{
     unsigned Line;
     unsigned Col;
@@ -59,16 +58,6 @@ void LLVMSetSubprogram(LLVMValueRef Fn, 
 #ifdef __cplusplus
 }
 
-namespace llvm {
-
-DEFINE_ISA_CONVERSION_FUNCTIONS(Metadata, LLVMMetadataRef)
-
-inline Metadata **unwrap(LLVMMetadataRef *Vals) {
-  return reinterpret_cast<Metadata**>(Vals);
-}
-
-}
-
 #endif
 
 #endif

Modified: vendor/llvm/dist/cmake/modules/AddLLVM.cmake
==============================================================================
--- vendor/llvm/dist/cmake/modules/AddLLVM.cmake	Thu Apr 20 21:04:21 2017	(r317217)
+++ vendor/llvm/dist/cmake/modules/AddLLVM.cmake	Thu Apr 20 21:19:10 2017	(r317218)
@@ -81,8 +81,9 @@ function(add_llvm_symbol_exports target_
     # Gold and BFD ld require a version script rather than a plain list.
     set(native_export_file "${target_name}.exports")
     # FIXME: Don't write the "local:" line on OpenBSD.
+    # in the export file, also add a linker script to version LLVM symbols (form: LLVM_N.M)
     add_custom_command(OUTPUT ${native_export_file}
-      COMMAND echo "{" > ${native_export_file}
+      COMMAND echo "LLVM_${LLVM_VERSION_MAJOR}.${LLVM_VERSION_MINOR} {" > ${native_export_file}
       COMMAND grep -q "[[:alnum:]]" ${export_file} && echo "  global:" >> ${native_export_file} || :
       COMMAND sed -e "s/$/;/" -e "s/^/    /" < ${export_file} >> ${native_export_file}
       COMMAND echo "  local: *;" >> ${native_export_file}

Modified: vendor/llvm/dist/docs/BitCodeFormat.rst
==============================================================================
--- vendor/llvm/dist/docs/BitCodeFormat.rst	Thu Apr 20 21:04:21 2017	(r317217)
+++ vendor/llvm/dist/docs/BitCodeFormat.rst	Thu Apr 20 21:19:10 2017	(r317218)
@@ -550,6 +550,8 @@ LLVM IR is defined with the following bl
 
 * 17 --- `TYPE_BLOCK`_ --- This describes all of the types in the module.
 
+* 23 --- `STRTAB_BLOCK`_ --- The bitcode file's string table.
+
 .. _MODULE_BLOCK:
 
 MODULE_BLOCK Contents
@@ -577,7 +579,7 @@ MODULE_CODE_VERSION Record
 ``[VERSION, version#]``
 
 The ``VERSION`` record (code 1) contains a single value indicating the format
-version. Versions 0 and 1 are supported at this time. The difference between
+version. Versions 0, 1 and 2 are supported at this time. The difference between
 version 0 and 1 is in the encoding of instruction operands in
 each `FUNCTION_BLOCK`_.
 
@@ -620,6 +622,12 @@ as unsigned VBRs. However, forward refer
 case of phi instructions. For phi instructions, operands are encoded as
 `Signed VBRs`_ to deal with forward references.
 
+In version 2, the meaning of module records ``FUNCTION``, ``GLOBALVAR``,
+``ALIAS``, ``IFUNC`` and ``COMDAT`` change such that the first two operands
+specify an offset and size of a string in a string table (see `STRTAB_BLOCK
+Contents`_), the function name is removed from the ``FNENTRY`` record in the
+value symbol table, and the top-level ``VALUE_SYMTAB_BLOCK`` may only contain
+``FNENTRY`` records.
 
 MODULE_CODE_TRIPLE Record
 ^^^^^^^^^^^^^^^^^^^^^^^^^
@@ -673,11 +681,14 @@ for each library name referenced.
 MODULE_CODE_GLOBALVAR Record
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-``[GLOBALVAR, pointer type, isconst, initid, linkage, alignment, section, visibility, threadlocal, unnamed_addr, externally_initialized, dllstorageclass, comdat]``
+``[GLOBALVAR, strtab offset, strtab size, pointer type, isconst, initid, linkage, alignment, section, visibility, threadlocal, unnamed_addr, externally_initialized, dllstorageclass, comdat]``
 
 The ``GLOBALVAR`` record (code 7) marks the declaration or definition of a
 global variable. The operand fields are:
 
+* *strtab offset*, *strtab size*: Specifies the name of the global variable.
+  See `STRTAB_BLOCK Contents`_.
+
 * *pointer type*: The type index of the pointer type used to point to this
   global variable
 
@@ -755,11 +766,14 @@ global variable. The operand fields are:
 MODULE_CODE_FUNCTION Record
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-``[FUNCTION, type, callingconv, isproto, linkage, paramattr, alignment, section, visibility, gc, prologuedata, dllstorageclass, comdat, prefixdata, personalityfn]``
+``[FUNCTION, strtab offset, strtab size, type, callingconv, isproto, linkage, paramattr, alignment, section, visibility, gc, prologuedata, dllstorageclass, comdat, prefixdata, personalityfn]``
 
 The ``FUNCTION`` record (code 8) marks the declaration or definition of a
 function. The operand fields are:
 
+* *strtab offset*, *strtab size*: Specifies the name of the function.
+  See `STRTAB_BLOCK Contents`_.
+
 * *type*: The type index of the function type describing this function
 
 * *callingconv*: The calling convention number:
@@ -817,11 +831,14 @@ function. The operand fields are:
 MODULE_CODE_ALIAS Record
 ^^^^^^^^^^^^^^^^^^^^^^^^
 
-``[ALIAS, alias type, aliasee val#, linkage, visibility, dllstorageclass, threadlocal, unnamed_addr]``
+``[ALIAS, strtab offset, strtab size, alias type, aliasee val#, linkage, visibility, dllstorageclass, threadlocal, unnamed_addr]``
 
 The ``ALIAS`` record (code 9) marks the definition of an alias. The operand
 fields are
 
+* *strtab offset*, *strtab size*: Specifies the name of the alias.
+  See `STRTAB_BLOCK Contents`_.
+
 * *alias type*: The type index of the alias
 
 * *aliasee val#*: The value index of the aliased value
@@ -1300,3 +1317,20 @@ METADATA_ATTACHMENT Contents
 ----------------------------
 
 The ``METADATA_ATTACHMENT`` block (id 16) ...
+
+.. _STRTAB_BLOCK:
+
+STRTAB_BLOCK Contents
+---------------------
+
+The ``STRTAB`` block (id 23) contains a single record (``STRTAB_BLOB``, id 1)
+with a single blob operand containing the bitcode file's string table.
+
+Strings in the string table are not null terminated. A record's *strtab
+offset* and *strtab size* operands specify the byte offset and size of a
+string within the string table.
+
+The string table is used by all preceding blocks in the bitcode file that are
+not succeeded by another intervening ``STRTAB`` block. Normally a bitcode
+file will have a single string table, but it may have more than one if it
+was created by binary concatenation of multiple bitcode files.

Modified: vendor/llvm/dist/docs/LangRef.rst
==============================================================================
--- vendor/llvm/dist/docs/LangRef.rst	Thu Apr 20 21:04:21 2017	(r317217)
+++ vendor/llvm/dist/docs/LangRef.rst	Thu Apr 20 21:19:10 2017	(r317218)
@@ -4380,7 +4380,7 @@ referenced LLVM variable relates to the 
 
 The current supported vocabulary is limited:
 
-- ``DW_OP_deref`` dereferences the working expression.
+- ``DW_OP_deref`` dereferences the top of the expression stack.
 - ``DW_OP_plus, 93`` adds ``93`` to the working expression.
 - ``DW_OP_LLVM_fragment, 16, 8`` specifies the offset and size (``16`` and ``8``
   here, respectively) of the variable fragment from the working expression. Note
@@ -4396,12 +4396,17 @@ DIExpression nodes that contain a ``DW_O
 location descriptions that describe constant values. This form is used to
 describe global constants that have been optimized away. All other expressions
 are modifiers to another location: A debug intrinsic ties a location and a
-DIExpression together. Contrary to DWARF expressions, a DIExpression always
-describes the *value* of a source variable and never its *address*. In DWARF
-terminology, a DIExpression can always be considered an implicit location
-description regardless whether it contains a ``DW_OP_stack_value`` or not.
+DIExpression together.
 
-.. code-block:: text
+DWARF specifies three kinds of simple location descriptions: Register, memory,
+and implicit location descriptions. Register and memory location descriptions
+describe the *location* of a source variable (in the sense that a debugger might
+modify its value), whereas implicit locations describe merely the *value* of a
+source variable. DIExpressions also follow this model: A DIExpression that
+doesn't have a trailing ``DW_OP_stack_value`` will describe an *address* when
+combined with a concrete location.
+
+.. code-block:: llvm
 
     !0 = !DIExpression(DW_OP_deref)
     !1 = !DIExpression(DW_OP_plus, 3)
@@ -12285,6 +12290,7 @@ The third argument is a metadata argumen
 assumed. This argument must be one of the following strings:
 
 ::
+
       "round.dynamic"
       "round.tonearest"
       "round.downward"
@@ -12316,6 +12322,7 @@ required exception behavior.  This argum
 strings:
 
 ::
+
       "fpexcept.ignore"
       "fpexcept.maytrap"
       "fpexcept.strict"

Modified: vendor/llvm/dist/docs/SourceLevelDebugging.rst
==============================================================================
--- vendor/llvm/dist/docs/SourceLevelDebugging.rst	Thu Apr 20 21:04:21 2017	(r317217)
+++ vendor/llvm/dist/docs/SourceLevelDebugging.rst	Thu Apr 20 21:19:10 2017	(r317218)
@@ -180,11 +180,27 @@ provide debug information at various poi
 
   void @llvm.dbg.declare(metadata, metadata, metadata)
 
-This intrinsic provides information about a local element (e.g., variable).
-The first argument is metadata holding the alloca for the variable.  The second
+This intrinsic provides information about a local element (e.g., variable).  The
+first argument is metadata holding the alloca for the variable.  The second
 argument is a `local variable <LangRef.html#dilocalvariable>`_ containing a
 description of the variable.  The third argument is a `complex expression
-<LangRef.html#diexpression>`_.
+<LangRef.html#diexpression>`_.  An `llvm.dbg.declare` instrinsic describes the
+*location* of a source variable.
+
+.. code-block:: llvm
+
+    %i.addr = alloca i32, align 4
+    call void @llvm.dbg.declare(metadata i32* %i.addr, metadata !1, metadata !2), !dbg !3
+    !1 = !DILocalVariable(name: "i", ...) ; int i
+    !2 = !DIExpression()
+    !3 = !DILocation(...)
+    ...
+    %buffer = alloca [256 x i8], align 8
+    ; The address of i is buffer+64.
+    call void @llvm.dbg.declare(metadata [256 x i8]* %buffer, metadata !1, metadata !2)
+    !1 = !DILocalVariable(name: "i", ...) ; int i
+    !2 = !DIExpression(DW_OP_plus, 64)
+
 
 ``llvm.dbg.value``
 ^^^^^^^^^^^^^^^^^^

Modified: vendor/llvm/dist/docs/Statepoints.rst
==============================================================================
--- vendor/llvm/dist/docs/Statepoints.rst	Thu Apr 20 21:04:21 2017	(r317217)
+++ vendor/llvm/dist/docs/Statepoints.rst	Thu Apr 20 21:19:10 2017	(r317218)
@@ -9,15 +9,22 @@ Garbage Collection Safepoints in LLVM
 Status
 =======
 
-This document describes a set of experimental extensions to LLVM. Use
-with caution.  Because the intrinsics have experimental status,
-compatibility across LLVM releases is not guaranteed.
-
-LLVM currently supports an alternate mechanism for conservative
-garbage collection support using the ``gcroot`` intrinsic.  The mechanism
-described here shares little in common with the alternate ``gcroot``
-implementation and it is hoped that this mechanism will eventually
-replace the gc_root mechanism.
+This document describes a set of extensions to LLVM to support garbage
+collection.  By now, these mechanisms are well proven with commercial java 
+implementation with a fully relocating collector having shipped using them.  
+There are a couple places where bugs might still linger; these are called out
+below.
+
+They are still listed as "experimental" to indicate that no forward or backward
+compatibility guarantees are offered across versions.  If your use case is such 
+that you need some form of forward compatibility guarantee, please raise the 
+issue on the llvm-dev mailing list.  
+
+LLVM still supports an alternate mechanism for conservative garbage collection 
+support using the ``gcroot`` intrinsic.  The ``gcroot`` mechanism is mostly of
+historical interest at this point with one exception - its implementation of
+shadow stacks has been used successfully by a number of language frontends and
+is still supported.  
 
 Overview
 ========
@@ -86,9 +93,36 @@ the collector must be able to:
 
 This document describes the mechanism by which an LLVM based compiler
 can provide this information to a language runtime/collector, and
-ensure that all pointers can be read and updated if desired.  The
-heart of the approach is to construct (or rewrite) the IR in a manner
-where the possible updates performed by the garbage collector are
+ensure that all pointers can be read and updated if desired.  
+
+At a high level, LLVM has been extended to support compiling to an abstract 
+machine which extends the actual target with a non-integral pointer type 
+suitable for representing a garbage collected reference to an object.  In 
+particular, such non-integral pointer type have no defined mapping to an 
+integer representation.  This semantic quirk allows the runtime to pick a 
+integer mapping for each point in the program allowing relocations of objects 
+without visible effects.
+
+Warning: Non-Integral Pointer Types are a newly added concept in LLVM IR.  
+It's possible that we've missed disabling some of the optimizations which 
+assume an integral value for pointers.  If you find such a case, please 
+file a bug or share a patch.
+
+Warning: There is one currently known semantic hole in the definition of 
+non-integral pointers which has not been addressed upstream.  To work around
+this, you need to disable speculation of loads unless the memory type 
+(non-integral pointer vs anything else) is known to unchanged.  That is, it is 
+not safe to speculate a load if doing causes a non-integral pointer value to 
+be loaded as any other type or vice versa.  In practice, this restriction is 
+well isolated to isSafeToSpeculate in ValueTracking.cpp.
+
+This high level abstract machine model is used for most of the LLVM optimizer.
+Before starting code generation, we switch representations to an explicit form.
+In theory, a frontend could directly generate this low level explicit form, but 
+doing so is likely to inhibit optimization.  
+
+The heart of the explicit approach is to construct (or rewrite) the IR in a 
+manner where the possible updates performed by the garbage collector are
 explicitly visible in the IR.  Doing so requires that we:
 
 #. create a new SSA value for each potentially relocated pointer, and
@@ -104,7 +138,7 @@ explicitly visible in the IR.  Doing so 
 At the most abstract level, inserting a safepoint can be thought of as
 replacing a call instruction with a call to a multiple return value
 function which both calls the original target of the call, returns
-it's result, and returns updated values for any live pointers to
+its result, and returns updated values for any live pointers to
 garbage collected objects.
 
   Note that the task of identifying all live pointers to garbage
@@ -200,7 +234,9 @@ The relevant parts of the StackMap secti
 	  .short	7
 	  .long	0
 
-This example was taken from the tests for the :ref:`RewriteStatepointsForGC` utility pass.  As such, it's full StackMap can be easily examined with the following command.
+This example was taken from the tests for the :ref:`RewriteStatepointsForGC`
+utility pass.  As such, its full StackMap can be easily examined with the
+following command.
 
 .. code-block:: bash
 
@@ -536,7 +572,7 @@ Semantics:
 """"""""""
 
 The return value of ``gc.relocate`` is the potentially relocated value
-of the pointer specified by it's arguments.  It is unspecified how the
+of the pointer specified by its arguments.  It is unspecified how the
 value of the returned pointer relates to the argument to the
 ``gc.statepoint`` other than that a) it points to the same source
 language object with the same offset, and b) the 'based-on'
@@ -654,11 +690,15 @@ Utility Passes for Safepoint Insertion
 RewriteStatepointsForGC
 ^^^^^^^^^^^^^^^^^^^^^^^^
 
-The pass RewriteStatepointsForGC transforms a functions IR by replacing a 
-``gc.statepoint`` (with an optional ``gc.result``) with a full relocation 
-sequence, including all required ``gc.relocates``.  To function, the pass 
-requires that the GC strategy specified for the function be able to reliably 
-distinguish between GC references and non-GC references in IR it is given.
+The pass RewriteStatepointsForGC transforms a function's IR to lower from the
+abstract machine model described above to the explicit statepoint model of 
+relocations.  To do this, it replaces all calls or invokes of functions which
+might contain a safepoint poll with a ``gc.statepoint`` and associated full
+relocation sequence, including all required ``gc.relocates``.  
+
+Note that by default, this pass only runs for the "statepoint-example" or 
+"core-clr" gc strategies.  You will need to add your custom strategy to this 
+whitelist or use one of the predefined ones. 
 
 As an example, given this code:
 
@@ -666,7 +706,7 @@ As an example, given this code:
 
   define i8 addrspace(1)* @test1(i8 addrspace(1)* %obj) 
          gc "statepoint-example" {
-    call token (i64, i32, void ()*, i32, i32, ...)* @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 2882400000, i32 0, void ()* @foo, i32 0, i32 0, i32 0, i32 5, i32 0, i32 -1, i32 0, i32 0, i32 0)
+    call void @foo()
     ret i8 addrspace(1)* %obj
   }
 
@@ -683,7 +723,8 @@ The pass would produce this IR:
 
 In the above examples, the addrspace(1) marker on the pointers is the mechanism
 that the ``statepoint-example`` GC strategy uses to distinguish references from
-non references.  Address space 1 is not globally reserved for this purpose.
+non references.  The pass assumes that all addrspace(1) pointers are non-integral
+pointer types.  Address space 1 is not globally reserved for this purpose.
 
 This pass can be used an utility function by a language frontend that doesn't 
 want to manually reason about liveness, base pointers, or relocation when 
@@ -701,23 +742,34 @@ can be relaxed to producing interior der
 collector can find the associated allocation from an arbitrary interior 
 derived pointer.
 
-In practice, RewriteStatepointsForGC can be run much later in the pass 
+By default RewriteStatepointsForGC passes in ``0xABCDEF00`` as the statepoint
+ID and ``0`` as the number of patchable bytes to the newly constructed
+``gc.statepoint``.  These values can be configured on a per-callsite
+basis using the attributes ``"statepoint-id"`` and
+``"statepoint-num-patch-bytes"``.  If a call site is marked with a
+``"statepoint-id"`` function attribute and its value is a positive
+integer (represented as a string), then that value is used as the ID
+of the newly constructed ``gc.statepoint``.  If a call site is marked
+with a ``"statepoint-num-patch-bytes"`` function attribute and its
+value is a positive integer, then that value is used as the 'num patch
+bytes' parameter of the newly constructed ``gc.statepoint``.  The
+``"statepoint-id"`` and ``"statepoint-num-patch-bytes"`` attributes
+are not propagated to the ``gc.statepoint`` call or invoke if they
+could be successfully parsed.
+
+In practice, RewriteStatepointsForGC should be run much later in the pass 
 pipeline, after most optimization is already done.  This helps to improve 
 the quality of the generated code when compiled with garbage collection support.
-In the long run, this is the intended usage model.  At this time, a few details
-have yet to be worked out about the semantic model required to guarantee this 
-is always correct.  As such, please use with caution and report bugs.
 
 .. _PlaceSafepoints:
 
 PlaceSafepoints
 ^^^^^^^^^^^^^^^^
 
-The pass PlaceSafepoints transforms a function's IR by replacing any call or 
-invoke instructions with appropriate ``gc.statepoint`` and ``gc.result`` pairs,
-and inserting safepoint polls sufficient to ensure running code checks for a 
-safepoint request on a timely manner.  This pass is expected to be run before 
-RewriteStatepointsForGC and thus does not produce full relocation sequences.  
+The pass PlaceSafepoints inserts safepoint polls sufficient to ensure running 
+code checks for a safepoint request on a timely manner. This pass is expected 
+to be run before RewriteStatepointsForGC and thus does not produce full 
+relocation sequences.  
 
 As an example, given input IR of the following:
 
@@ -740,13 +792,16 @@ This pass would produce the following IR
 .. code-block:: text
 
   define void @test() gc "statepoint-example" {
-    %safepoint_token = call token (i64, i32, void ()*, i32, i32, ...)* @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 2882400000, i32 0, void ()* @do_safepoint, i32 0, i32 0, i32 0, i32 0)
-    %safepoint_token1 = call token (i64, i32, void ()*, i32, i32, ...)* @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 2882400000, i32 0, void ()* @foo, i32 0, i32 0, i32 0, i32 0)
+    call void @do_safepoint()
+    call void @foo()
     ret void
   }
 
-In this case, we've added an (unconditional) entry safepoint poll and converted the call into a ``gc.statepoint``.  Note that despite appearances, the entry poll is not necessarily redundant.  We'd have to know that ``foo`` and ``test`` were not mutually recursive for the poll to be redundant.  In practice, you'd probably want to your poll definition to contain a conditional branch of some form.
-
+In this case, we've added an (unconditional) entry safepoint poll.  Note that 
+despite appearances, the entry poll is not necessarily redundant.  We'd have to 
+know that ``foo`` and ``test`` were not mutually recursive for the poll to be 
+redundant.  In practice, you'd probably want to your poll definition to contain 
+a conditional branch of some form.
 
 At the moment, PlaceSafepoints can insert safepoint polls at method entry and 
 loop backedges locations.  Extending this to work with return polls would be 
@@ -763,26 +818,13 @@ of this function is inserted at each pol
 inside this method are transformed to a ``gc.statepoints``, recursive poll 
 insertion is not performed.
 
-By default PlaceSafepoints passes in ``0xABCDEF00`` as the statepoint
-ID and ``0`` as the number of patchable bytes to the newly constructed
-``gc.statepoint``.  These values can be configured on a per-callsite
-basis using the attributes ``"statepoint-id"`` and
-``"statepoint-num-patch-bytes"``.  If a call site is marked with a
-``"statepoint-id"`` function attribute and its value is a positive
-integer (represented as a string), then that value is used as the ID
-of the newly constructed ``gc.statepoint``.  If a call site is marked
-with a ``"statepoint-num-patch-bytes"`` function attribute and its
-value is a positive integer, then that value is used as the 'num patch
-bytes' parameter of the newly constructed ``gc.statepoint``.  The
-``"statepoint-id"`` and ``"statepoint-num-patch-bytes"`` attributes
-are not propagated to the ``gc.statepoint`` call or invoke if they
-could be successfully parsed.
-
-If you are scheduling the RewriteStatepointsForGC pass late in the pass order,
-you should probably schedule this pass immediately before it.  The exception 
-would be if you need to preserve abstract frame information (e.g. for
-deoptimization or introspection) at safepoints.  In that case, ask on the 
-llvm-dev mailing list for suggestions.
+This pass is useful for any language frontend which only has to support
+garbage collection semantics at safepoints.  If you need other abstract
+frame information at safepoints (e.g. for deoptimization or introspection),
+you can insert safepoint polls in the frontend.  If you have the later case,
+please ask on llvm-dev for suggestions.  There's been a good amount of work
+done on making such a scheme work well in practice which is not yet documented
+here.  
 
 
 Supported Architectures
@@ -794,13 +836,6 @@ Today, only X86_64 is supported.  
 Problem Areas and Active Work
 =============================
 
-#. As the existing users of the late rewriting model have matured, we've found
-   cases where the optimizer breaks the assumption that an SSA value of
-   gc-pointer type actually contains a gc-pointer and vice-versa.  We need to
-   clarify our expectations and propose at least one small IR change.  (Today,
-   the gc-pointer distinction is managed via address spaces.  This turns out
-   not to be quite strong enough.)
-
 #. Support for languages which allow unmanaged pointers to garbage collected
    objects (i.e. pass a pointer to an object to a C routine) via pinning.
 

Modified: vendor/llvm/dist/include/llvm-c/Core.h
==============================================================================
--- vendor/llvm/dist/include/llvm-c/Core.h	Thu Apr 20 21:04:21 2017	(r317217)
+++ vendor/llvm/dist/include/llvm-c/Core.h	Thu Apr 20 21:19:10 2017	(r317218)
@@ -2131,6 +2131,16 @@ LLVMValueRef LLVMMDNodeInContext(LLVMCon
 LLVMValueRef LLVMMDNode(LLVMValueRef *Vals, unsigned Count);
 
 /**
+ * Obtain a Metadata as a Value.
+ */
+LLVMValueRef LLVMMetadataAsValue(LLVMContextRef C, LLVMMetadataRef MD);
+
+/**
+ * Obtain a Value as a Metadata.
+ */
+LLVMMetadataRef LLVMValueAsMetadata(LLVMValueRef Val);
+
+/**
  * Obtain the underlying string from a MDString value.
  *
  * @param V Instance to obtain string from.

Modified: vendor/llvm/dist/include/llvm-c/Types.h
==============================================================================
--- vendor/llvm/dist/include/llvm-c/Types.h	Thu Apr 20 21:04:21 2017	(r317217)
+++ vendor/llvm/dist/include/llvm-c/Types.h	Thu Apr 20 21:19:10 2017	(r317218)
@@ -83,6 +83,13 @@ typedef struct LLVMOpaqueValue *LLVMValu
 typedef struct LLVMOpaqueBasicBlock *LLVMBasicBlockRef;
 
 /**
+ * Represents an LLVM Metadata.
+ *
+ * This models llvm::Metadata.
+ */
+typedef struct LLVMOpaqueMetadata *LLVMMetadataRef;
+
+/**
  * Represents an LLVM basic block builder.
  *
  * This models llvm::IRBuilder.
@@ -90,6 +97,13 @@ typedef struct LLVMOpaqueBasicBlock *LLV
 typedef struct LLVMOpaqueBuilder *LLVMBuilderRef;
 
 /**
+ * Represents an LLVM debug info builder.
+ *
+ * This models llvm::DIBuilder.
+ */
+typedef struct LLVMOpaqueDIBuilder *LLVMDIBuilderRef;
+
+/**
  * Interface used to provide a module to JIT or interpreter.
  * This is now just a synonym for llvm::Module, but we have to keep using the
  * different type to keep binary compatibility.

Modified: vendor/llvm/dist/include/llvm/ADT/APInt.h
==============================================================================
--- vendor/llvm/dist/include/llvm/ADT/APInt.h	Thu Apr 20 21:04:21 2017	(r317217)
+++ vendor/llvm/dist/include/llvm/ADT/APInt.h	Thu Apr 20 21:19:10 2017	(r317218)
@@ -189,17 +189,17 @@ private:
   void initSlowCase(const APInt &that);
 
   /// out-of-line slow case for shl
-  APInt shlSlowCase(unsigned shiftAmt) const;
+  void shlSlowCase(unsigned ShiftAmt);
+
+  /// out-of-line slow case for lshr.
+  void lshrSlowCase(unsigned ShiftAmt);
 
   /// out-of-line slow case for operator=
-  APInt &AssignSlowCase(const APInt &RHS);
+  void AssignSlowCase(const APInt &RHS);
 
   /// out-of-line slow case for operator==
   bool EqualSlowCase(const APInt &RHS) const LLVM_READONLY;
 
-  /// out-of-line slow case for operator==
-  bool EqualSlowCase(uint64_t Val) const LLVM_READONLY;
-
   /// out-of-line slow case for countLeadingZeros
   unsigned countLeadingZerosSlowCase() const LLVM_READONLY;
 
@@ -209,6 +209,12 @@ private:
   /// out-of-line slow case for countPopulation
   unsigned countPopulationSlowCase() const LLVM_READONLY;
 
+  /// out-of-line slow case for intersects.
+  bool intersectsSlowCase(const APInt &RHS) const LLVM_READONLY;
+
+  /// out-of-line slow case for isSubsetOf.
+  bool isSubsetOfSlowCase(const APInt &RHS) const LLVM_READONLY;
+
   /// out-of-line slow case for setBits.
   void setBitsSlowCase(unsigned loBit, unsigned hiBit);
 
@@ -216,13 +222,13 @@ private:
   void flipAllBitsSlowCase();
 
   /// out-of-line slow case for operator&=.
-  APInt& AndAssignSlowCase(const APInt& RHS);
+  void AndAssignSlowCase(const APInt& RHS);
 
   /// out-of-line slow case for operator|=.
-  APInt& OrAssignSlowCase(const APInt& RHS);
+  void OrAssignSlowCase(const APInt& RHS);
 
   /// out-of-line slow case for operator^=.
-  APInt& XorAssignSlowCase(const APInt& RHS);
+  void XorAssignSlowCase(const APInt& RHS);
 
 public:
   /// \name Constructors
@@ -330,6 +336,20 @@ public:
   /// This tests the high bit of the APInt to determine if it is unset.
   bool isNonNegative() const { return !isNegative(); }
 
+  /// \brief Determine if sign bit of this APInt is set.
+  ///
+  /// This tests the high bit of this APInt to determine if it is set.
+  ///
+  /// \returns true if this APInt has its sign bit set, false otherwise.
+  bool isSignBitSet() const { return (*this)[BitWidth-1]; }
+
+  /// \brief Determine if sign bit of this APInt is clear.
+  ///
+  /// This tests the high bit of this APInt to determine if it is clear.
+  ///
+  /// \returns true if this APInt has its sign bit clear, false otherwise.
+  bool isSignBitClear() const { return !isSignBitSet(); }
+
   /// \brief Determine if this APInt Value is positive.
   ///
   /// This tests if the value of this APInt is positive (> 0). Note
@@ -396,10 +416,10 @@ public:
     return countPopulationSlowCase() == 1;
   }
 
-  /// \brief Check if the APInt's value is returned by getSignBit.
+  /// \brief Check if the APInt's value is returned by getSignMask.
   ///
-  /// \returns true if this is the value returned by getSignBit.
-  bool isSignBit() const { return isMinSignedValue(); }
+  /// \returns true if this is the value returned by getSignMask.
+  bool isSignMask() const { return isMinSignedValue(); }
 
   /// \brief Convert APInt to a boolean value.
   ///
@@ -409,8 +429,7 @@ public:
   /// If this value is smaller than the specified limit, return it, otherwise
   /// return the limit value.  This causes the value to saturate to the limit.
   uint64_t getLimitedValue(uint64_t Limit = UINT64_MAX) const {
-    return (getActiveBits() > 64 || getZExtValue() > Limit) ? Limit
-                                                            : getZExtValue();
+    return ugt(Limit) ? Limit : getZExtValue();
   }
 
   /// \brief Check if the APInt consists of a repeated bit pattern.
@@ -427,8 +446,9 @@ public:
     assert(numBits <= BitWidth && "numBits out of range");
     if (isSingleWord())
       return VAL == (UINT64_MAX >> (APINT_BITS_PER_WORD - numBits));
-    unsigned Ones = countTrailingOnes();
-    return (numBits == Ones) && ((Ones + countLeadingZeros()) == BitWidth);
+    unsigned Ones = countTrailingOnesSlowCase();
+    return (numBits == Ones) &&
+           ((Ones + countLeadingZerosSlowCase()) == BitWidth);
   }
 
   /// \returns true if this APInt is a non-empty sequence of ones starting at
@@ -437,8 +457,8 @@ public:
   bool isMask() const {
     if (isSingleWord())
       return isMask_64(VAL);
-    unsigned Ones = countTrailingOnes();
-    return (Ones > 0) && ((Ones + countLeadingZeros()) == BitWidth);
+    unsigned Ones = countTrailingOnesSlowCase();
+    return (Ones > 0) && ((Ones + countLeadingZerosSlowCase()) == BitWidth);
   }
 
   /// \brief Return true if this APInt value contains a sequence of ones with
@@ -446,8 +466,9 @@ public:
   bool isShiftedMask() const {
     if (isSingleWord())
       return isShiftedMask_64(VAL);
-    unsigned Ones = countPopulation();
-    return (Ones + countTrailingZeros() + countLeadingZeros()) == BitWidth;
+    unsigned Ones = countPopulationSlowCase();
+    unsigned LeadZ = countLeadingZerosSlowCase();
+    return (Ones + LeadZ + countTrailingZeros()) == BitWidth;
   }
 
   /// @}
@@ -476,11 +497,11 @@ public:
     return API;
   }
 
-  /// \brief Get the SignBit for a specific bit width.
+  /// \brief Get the SignMask for a specific bit width.
   ///
   /// This is just a wrapper function of getSignedMinValue(), and it helps code
-  /// readability when we want to get a SignBit.
-  static APInt getSignBit(unsigned BitWidth) {
+  /// readability when we want to get a SignMask.
+  static APInt getSignMask(unsigned BitWidth) {
     return getSignedMinValue(BitWidth);
   }
 
@@ -674,29 +695,22 @@ public:
       return clearUnusedBits();
     }
 
-    return AssignSlowCase(RHS);
+    AssignSlowCase(RHS);
+    return *this;
   }
 
   /// @brief Move assignment operator.
   APInt &operator=(APInt &&that) {
-    if (!isSingleWord()) {
-      // The MSVC STL shipped in 2013 requires that self move assignment be a
-      // no-op.  Otherwise algorithms like stable_sort will produce answers
-      // where half of the output is left in a moved-from state.
-      if (this == &that)
-        return *this;
+    assert(this != &that && "Self-move not supported");
+    if (!isSingleWord())
       delete[] pVal;
-    }
 
     // Use memcpy so that type based alias analysis sees both VAL and pVal
     // as modified.
     memcpy(&VAL, &that.VAL, sizeof(uint64_t));
 
-    // If 'this == &that', avoid zeroing our own bitwidth by storing to 'that'
-    // first.
-    unsigned ThatBitWidth = that.BitWidth;
+    BitWidth = that.BitWidth;
     that.BitWidth = 0;
-    BitWidth = ThatBitWidth;
 
     return *this;
   }
@@ -727,11 +741,11 @@ public:
   /// \returns *this after ANDing with RHS.
   APInt &operator&=(const APInt &RHS) {
     assert(BitWidth == RHS.BitWidth && "Bit widths must be the same");
-    if (isSingleWord()) {
+    if (isSingleWord())
       VAL &= RHS.VAL;
-      return *this;
-    }
-    return AndAssignSlowCase(RHS);
+    else
+      AndAssignSlowCase(RHS);
+    return *this;
   }
 
   /// \brief Bitwise AND assignment operator.
@@ -757,11 +771,11 @@ public:
   /// \returns *this after ORing with RHS.
   APInt &operator|=(const APInt &RHS) {
     assert(BitWidth == RHS.BitWidth && "Bit widths must be the same");
-    if (isSingleWord()) {
+    if (isSingleWord())
       VAL |= RHS.VAL;
-      return *this;
-    }
-    return OrAssignSlowCase(RHS);
+    else
+      OrAssignSlowCase(RHS);
+    return *this;
   }
 
   /// \brief Bitwise OR assignment operator.
@@ -787,11 +801,11 @@ public:
   /// \returns *this after XORing with RHS.
   APInt &operator^=(const APInt &RHS) {
     assert(BitWidth == RHS.BitWidth && "Bit widths must be the same");
-    if (isSingleWord()) {
+    if (isSingleWord())
       VAL ^= RHS.VAL;
-      return *this;
-    }
-    return XorAssignSlowCase(RHS);
+    else
+      XorAssignSlowCase(RHS);
+    return *this;
   }
 
   /// \brief Bitwise XOR assignment operator.
@@ -836,9 +850,17 @@ public:
   ///
   /// Shifts *this left by shiftAmt and assigns the result to *this.
   ///
-  /// \returns *this after shifting left by shiftAmt
-  APInt &operator<<=(unsigned shiftAmt) {
-    *this = shl(shiftAmt);
+  /// \returns *this after shifting left by ShiftAmt
+  APInt &operator<<=(unsigned ShiftAmt) {
+    assert(ShiftAmt <= BitWidth && "Invalid shift amount");
+    if (isSingleWord()) {
+      if (ShiftAmt == BitWidth)
+        VAL = 0;
+      else
+        VAL <<= ShiftAmt;
+      return clearUnusedBits();
+    }
+    shlSlowCase(ShiftAmt);
     return *this;
   }
 
@@ -875,20 +897,26 @@ public:
     return R;
   }
 
-  /// Logical right-shift this APInt by shiftAmt in place.
-  void lshrInPlace(unsigned shiftAmt);
+  /// Logical right-shift this APInt by ShiftAmt in place.
+  void lshrInPlace(unsigned ShiftAmt) {
+    assert(ShiftAmt <= BitWidth && "Invalid shift amount");
+    if (isSingleWord()) {
+      if (ShiftAmt == BitWidth)
+        VAL = 0;
+      else
+        VAL >>= ShiftAmt;
+      return;
+    }
+    lshrSlowCase(ShiftAmt);
+  }
 
   /// \brief Left-shift function.
   ///
   /// Left-shift this APInt by shiftAmt.
   APInt shl(unsigned shiftAmt) const {
-    assert(shiftAmt <= BitWidth && "Invalid shift amount");
-    if (isSingleWord()) {
-      if (shiftAmt >= BitWidth)
-        return APInt(BitWidth, 0); // avoid undefined shift results
-      return APInt(BitWidth, VAL << shiftAmt);
-    }
-    return shlSlowCase(shiftAmt);
+    APInt R(*this);
+    R <<= shiftAmt;
+    return R;
   }
 
   /// \brief Rotate left by rotateAmt.
@@ -905,7 +933,14 @@ public:
   /// \brief Logical right-shift function.
   ///
   /// Logical right-shift this APInt by shiftAmt.
-  APInt lshr(const APInt &shiftAmt) const;
+  APInt lshr(const APInt &ShiftAmt) const {
+    APInt R(*this);
+    R.lshrInPlace(ShiftAmt);
+    return R;
+  }
+
+  /// Logical right-shift this APInt by ShiftAmt in place.
+  void lshrInPlace(const APInt &ShiftAmt);
 
   /// \brief Left-shift function.
   ///
@@ -1003,9 +1038,7 @@ public:
   ///
   /// \returns true if *this == Val
   bool operator==(uint64_t Val) const {
-    if (isSingleWord())
-      return VAL == Val;
-    return EqualSlowCase(Val);
+    return (isSingleWord() || getActiveBits() <= 64) && getZExtValue() == Val;
   }
 
   /// \brief Equality comparison.
@@ -1055,7 +1088,8 @@ public:
   ///
   /// \returns true if *this < RHS when considered unsigned.
   bool ult(uint64_t RHS) const {
-    return getActiveBits() > 64 ? false : getZExtValue() < RHS;
+    // Only need to check active bits if not a single word.
+    return (isSingleWord() || getActiveBits() <= 64) && getZExtValue() < RHS;
   }
 
   /// \brief Signed less than comparison
@@ -1073,7 +1107,8 @@ public:
   ///
   /// \returns true if *this < RHS when considered signed.
   bool slt(int64_t RHS) const {
-    return getMinSignedBits() > 64 ? isNegative() : getSExtValue() < RHS;
+    return (!isSingleWord() && getMinSignedBits() > 64) ? isNegative()
+                                                        : getSExtValue() < RHS;
   }
 
   /// \brief Unsigned less or equal comparison
@@ -1123,7 +1158,8 @@ public:
   ///
   /// \returns true if *this > RHS when considered unsigned.
   bool ugt(uint64_t RHS) const {
-    return getActiveBits() > 64 ? true : getZExtValue() > RHS;
+    // Only need to check active bits if not a single word.
+    return (!isSingleWord() && getActiveBits() > 64) || getZExtValue() > RHS;
   }
 
   /// \brief Signed greather than comparison
@@ -1141,7 +1177,8 @@ public:
   ///
   /// \returns true if *this > RHS when considered signed.
   bool sgt(int64_t RHS) const {
-    return getMinSignedBits() > 64 ? !isNegative() : getSExtValue() > RHS;
+    return (!isSingleWord() && getMinSignedBits() > 64) ? !isNegative()
+                                                        : getSExtValue() > RHS;
   }
 
   /// \brief Unsigned greater or equal comparison
@@ -1179,9 +1216,18 @@ public:
   /// This operation tests if there are any pairs of corresponding bits
   /// between this APInt and RHS that are both set.
   bool intersects(const APInt &RHS) const {
-    APInt temp(*this);
-    temp &= RHS;
-    return temp != 0;
+    assert(BitWidth == RHS.BitWidth && "Bit widths must be the same");
+    if (isSingleWord())
+      return (VAL & RHS.VAL) != 0;
+    return intersectsSlowCase(RHS);
+  }
+
+  /// This operation checks that all bits set in this APInt are also set in RHS.
+  bool isSubsetOf(const APInt &RHS) const {
+    assert(BitWidth == RHS.BitWidth && "Bit widths must be the same");
+    if (isSingleWord())
+      return (VAL & ~RHS.VAL) == 0;
+    return isSubsetOfSlowCase(RHS);
   }
 
   /// @}
@@ -1404,8 +1450,7 @@ public:
   /// int64_t. Otherwise an assertion will result.
   int64_t getSExtValue() const {
     if (isSingleWord())
-      return int64_t(VAL << (APINT_BITS_PER_WORD - BitWidth)) >>
-             (APINT_BITS_PER_WORD - BitWidth);
+      return SignExtend64(VAL, BitWidth);
     assert(getMinSignedBits() <= 64 && "Too many bits for int64_t");
     return int64_t(pVal[0]);
   }
@@ -1759,13 +1804,13 @@ public:
                       WordType *remainder, WordType *scratch,
                       unsigned parts);
 
-  /// Shift a bignum left COUNT bits.  Shifted in bits are zero.  There are no
-  /// restrictions on COUNT.
-  static void tcShiftLeft(WordType *, unsigned parts, unsigned count);
-
-  /// Shift a bignum right COUNT bits.  Shifted in bits are zero.  There are no
-  /// restrictions on COUNT.
-  static void tcShiftRight(WordType *, unsigned parts, unsigned count);
+  /// Shift a bignum left Count bits. Shifted in bits are zero. There are no
+  /// restrictions on Count.
+  static void tcShiftLeft(WordType *, unsigned Words, unsigned Count);
+
+  /// Shift a bignum right Count bits.  Shifted in bits are zero.  There are no
+  /// restrictions on Count.
+  static void tcShiftRight(WordType *, unsigned Words, unsigned Count);
 
   /// The obvious AND, OR and XOR and complement operations.
   static void tcAnd(WordType *, const WordType *, unsigned);
@@ -1959,7 +2004,7 @@ inline const APInt &umax(const APInt &A,
 /// \brief Compute GCD of two unsigned APInt values.
 ///
 /// This function returns the greatest common divisor of the two APInt values
-/// using Euclid's algorithm.
+/// using Stein's algorithm.
 ///
 /// \returns the greatest common divisor of A and B.
 APInt GreatestCommonDivisor(APInt A, APInt B);

Modified: vendor/llvm/dist/include/llvm/ADT/BitVector.h
==============================================================================
--- vendor/llvm/dist/include/llvm/ADT/BitVector.h	Thu Apr 20 21:04:21 2017	(r317217)
+++ vendor/llvm/dist/include/llvm/ADT/BitVector.h	Thu Apr 20 21:19:10 2017	(r317218)
@@ -14,6 +14,8 @@
 #ifndef LLVM_ADT_BITVECTOR_H
 #define LLVM_ADT_BITVECTOR_H
 
+#include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/MathExtras.h"
 #include <algorithm>
 #include <cassert>
@@ -455,6 +457,105 @@ public:
     return *this;
   }
 
+  BitVector &operator>>=(unsigned N) {
+    assert(N <= Size);
+    if (LLVM_UNLIKELY(empty() || N == 0))
+      return *this;
+
+    unsigned NumWords = NumBitWords(Size);
+    assert(NumWords >= 1);
+
+    wordShr(N / BITWORD_SIZE);
+
+    unsigned BitDistance = N % BITWORD_SIZE;
+    if (BitDistance == 0)
+      return *this;

*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***



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