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From: Adrian Chadd <adrian@FreeBSD.org>
Date: Mon, 7 Feb 2011 21:30:14 +0000 (UTC)
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Subject: svn commit: r218415 - head/sys/dev/ath/ath_hal
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Author: adrian
Date: Mon Feb  7 21:30:13 2011
New Revision: 218415
URL: http://svn.freebsd.org/changeset/base/218415

Log:
  Add a new RMW macro for analog register writes which implements the needed
  wait period between operations.

Modified:
  head/sys/dev/ath/ath_hal/ah_internal.h

Modified: head/sys/dev/ath/ath_hal/ah_internal.h
==============================================================================
--- head/sys/dev/ath/ath_hal/ah_internal.h	Mon Feb  7 21:26:46 2011	(r218414)
+++ head/sys/dev/ath/ath_hal/ah_internal.h	Mon Feb  7 21:30:13 2011	(r218415)
@@ -466,6 +466,10 @@ isBigEndian(void)
 #define	OS_REG_CLR_BIT(_a, _r, _f) \
 	OS_REG_WRITE(_a, _r, OS_REG_READ(_a, _r) &~ (_f))
 
+/* Analog register writes may require a delay between each one (eg Merlin?) */
+#define	OS_A_REG_RMW_FIELD(_a, _r, _f, _v) \
+	do { OS_REG_WRITE(_a, _r, (OS_REG_READ(_a, _r) &~ (_f)) | (((_v) << _f##_S) & (_f))) ; OS_DELAY(100); } while (0)
+
 /* system-configurable parameters */
 extern	int ath_hal_dma_beacon_response_time;	/* in TU's */
 extern	int ath_hal_sw_beacon_response_time;	/* in TU's */