From owner-svn-src-head@FreeBSD.ORG Mon Oct 25 15:51:44 2010 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 2EF071065675; Mon, 25 Oct 2010 15:51:44 +0000 (UTC) (envelope-from nwhitehorn@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 025C08FC2B; Mon, 25 Oct 2010 15:51:44 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o9PFph9V070088; Mon, 25 Oct 2010 15:51:43 GMT (envelope-from nwhitehorn@svn.freebsd.org) Received: (from nwhitehorn@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o9PFphYS070084; Mon, 25 Oct 2010 15:51:43 GMT (envelope-from nwhitehorn@svn.freebsd.org) Message-Id: <201010251551.o9PFphYS070084@svn.freebsd.org> From: Nathan Whitehorn Date: Mon, 25 Oct 2010 15:51:43 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r214349 - in head/sys/dev: pci usb/controller X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 25 Oct 2010 15:51:44 -0000 Author: nwhitehorn Date: Mon Oct 25 15:51:43 2010 New Revision: 214349 URL: http://svn.freebsd.org/changeset/base/214349 Log: The EHCI_CAPLENGTH and EHCI_HCIVERSION registers are actually sub-registers within the first 4 bytes of the EHCI memory space. For controllers that use big-endian MMIO, reading them with 1- and 2-byte reads would then return the wrong values. Instead, read the combined register with a 4-byte read and mask out the interesting quantities. Modified: head/sys/dev/pci/pci.c head/sys/dev/usb/controller/ehci.c head/sys/dev/usb/controller/ehcireg.h Modified: head/sys/dev/pci/pci.c ============================================================================== --- head/sys/dev/pci/pci.c Mon Oct 25 15:41:12 2010 (r214348) +++ head/sys/dev/pci/pci.c Mon Oct 25 15:51:43 2010 (r214349) @@ -2803,7 +2803,7 @@ ehci_early_takeover(device_t self) "SMM does not respond\n"); } /* Disable interrupts */ - offs = bus_read_1(res, EHCI_CAPLENGTH); + offs = EHCI_CAPLENGTH(bus_read_4(res, EHCI_CAPLEN_HCIVERSION)); bus_write_4(res, offs + EHCI_USBINTR, 0); } bus_release_resource(self, SYS_RES_MEMORY, rid, res); Modified: head/sys/dev/usb/controller/ehci.c ============================================================================== --- head/sys/dev/usb/controller/ehci.c Mon Oct 25 15:41:12 2010 (r214348) +++ head/sys/dev/usb/controller/ehci.c Mon Oct 25 15:51:43 2010 (r214349) @@ -270,9 +270,9 @@ ehci_init(ehci_softc_t *sc) } #endif - sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH); + sc->sc_offs = EHCI_CAPLENGTH(EREAD4(sc, EHCI_CAPLEN_HCIVERSION)); - version = EREAD2(sc, EHCI_HCIVERSION); + version = EHCI_HCIVERSION(EREAD4(sc, EHCI_CAPLEN_HCIVERSION)); device_printf(sc->sc_bus.bdev, "EHCI version %x.%x\n", version >> 8, version & 0xff); Modified: head/sys/dev/usb/controller/ehcireg.h ============================================================================== --- head/sys/dev/usb/controller/ehcireg.h Mon Oct 25 15:41:12 2010 (r214348) +++ head/sys/dev/usb/controller/ehcireg.h Mon Oct 25 15:51:43 2010 (r214349) @@ -54,9 +54,13 @@ #define EHCI_LEGSUP_USBLEGCTLSTS 0x04 /* EHCI capability registers */ -#define EHCI_CAPLENGTH 0x00 /* RO Capability register length field */ -#define EHCI_RESERVED 0x01 /* Reserved register */ -#define EHCI_HCIVERSION 0x02 /* RO Interface version number */ +#define EHCI_CAPLEN_HCIVERSION 0x00 /* RO Capability register length + * (least-significant byte) and + * interface version number (two + * most significant) + */ +#define EHCI_CAPLENGTH(x) ((x) & 0xff) +#define EHCI_HCIVERSION(x) (((x) >> 16) & 0xffff) #define EHCI_HCSPARAMS 0x04 /* RO Structural parameters */ #define EHCI_HCS_DEBUGPORT(x) (((x) >> 20) & 0xf) #define EHCI_HCS_P_INDICATOR(x) ((x) & 0x10000)