From owner-svn-src-all@FreeBSD.ORG Sat Feb 14 12:17:51 2015 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 4B7903B1; Sat, 14 Feb 2015 12:17:51 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 323BE9E8; Sat, 14 Feb 2015 12:17:51 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t1ECHpk3023663; Sat, 14 Feb 2015 12:17:51 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t1ECHhdX023572; Sat, 14 Feb 2015 12:17:43 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201502141217.t1ECHhdX023572@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sat, 14 Feb 2015 12:17:43 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r278752 - in vendor/llvm/dist: cmake/modules docs include/llvm/CodeGen include/llvm/IR lib/Analysis lib/Analysis/IPA lib/Bitcode/Reader lib/CodeGen lib/CodeGen/AsmPrinter lib/CodeGen/Se... X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 14 Feb 2015 12:17:51 -0000 Author: dim Date: Sat Feb 14 12:17:42 2015 New Revision: 278752 URL: https://svnweb.freebsd.org/changeset/base/278752 Log: Vendor import of llvm RELEASE_360/rc3 tag r229040 (effectively, 3.6.0 RC3): https://llvm.org/svn/llvm-project/llvm/tags/RELEASE_360/rc3@229040 Added: vendor/llvm/dist/test/Bindings/llvm-c/Inputs/ vendor/llvm/dist/test/Bindings/llvm-c/Inputs/invalid.ll.bc (contents, props changed) vendor/llvm/dist/test/Bindings/llvm-c/invalid-bitcode.test vendor/llvm/dist/test/CodeGen/AArch64/setcc-type-mismatch.ll vendor/llvm/dist/test/CodeGen/ARM/setcc-type-mismatch.ll vendor/llvm/dist/test/CodeGen/PowerPC/vsel-prom.ll vendor/llvm/dist/test/CodeGen/R600/endcf-loop-header.ll vendor/llvm/dist/test/CodeGen/R600/tti-unroll-prefs.ll vendor/llvm/dist/test/CodeGen/X86/constant-combines.ll vendor/llvm/dist/test/CodeGen/X86/sse-unaligned-mem-feature.ll vendor/llvm/dist/test/DebugInfo/location-verifier.ll vendor/llvm/dist/test/Linker/distinct-cycles.ll vendor/llvm/dist/test/MC/ARM/pr22395-2.s (contents, props changed) vendor/llvm/dist/test/Transforms/Inline/inline-indirect.ll vendor/llvm/dist/test/Transforms/MemCpyOpt/callslot_aa.ll vendor/llvm/dist/test/Transforms/SLPVectorizer/X86/bad_types.ll vendor/llvm/dist/test/Transforms/Util/combine-alias-scope-metadata.ll vendor/llvm/dist/test/tools/gold/no-map-whole-file.ll Deleted: vendor/llvm/dist/test/CodeGen/ARM/vector-load.ll vendor/llvm/dist/test/CodeGen/ARM/vector-store.ll vendor/llvm/dist/test/CodeGen/X86/2010-01-07-UAMemFeature.ll vendor/llvm/dist/test/CodeGen/X86/seh-basic.ll vendor/llvm/dist/test/CodeGen/X86/seh-safe-div.ll Modified: vendor/llvm/dist/cmake/modules/AddLLVM.cmake vendor/llvm/dist/docs/ReleaseNotes.rst vendor/llvm/dist/include/llvm/CodeGen/MachineModuleInfo.h vendor/llvm/dist/include/llvm/CodeGen/RegAllocPBQP.h vendor/llvm/dist/include/llvm/IR/Metadata.h vendor/llvm/dist/lib/Analysis/IPA/InlineCost.cpp vendor/llvm/dist/lib/Analysis/TypeBasedAliasAnalysis.cpp vendor/llvm/dist/lib/Bitcode/Reader/BitReader.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/EHStreamer.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/EHStreamer.h vendor/llvm/dist/lib/CodeGen/AsmPrinter/Win64Exception.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/Win64Exception.h vendor/llvm/dist/lib/CodeGen/MachineModuleInfo.cpp vendor/llvm/dist/lib/CodeGen/Passes.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/DAGCombiner.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp vendor/llvm/dist/lib/IR/DebugInfo.cpp vendor/llvm/dist/lib/IR/Metadata.cpp vendor/llvm/dist/lib/IR/Type.cpp vendor/llvm/dist/lib/MC/MCSectionCOFF.cpp vendor/llvm/dist/lib/MC/WinCOFFObjectWriter.cpp vendor/llvm/dist/lib/Support/regcomp.c vendor/llvm/dist/lib/Target/AArch64/AArch64ISelLowering.cpp vendor/llvm/dist/lib/Target/ARM/ARMBaseInstrInfo.cpp vendor/llvm/dist/lib/Target/ARM/ARMISelLowering.cpp vendor/llvm/dist/lib/Target/ARM/AsmParser/ARMAsmParser.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCInstrInfo.td vendor/llvm/dist/lib/Target/R600/AMDGPUTargetTransformInfo.cpp vendor/llvm/dist/lib/Target/R600/SIAnnotateControlFlow.cpp vendor/llvm/dist/lib/Target/R600/SIRegisterInfo.cpp vendor/llvm/dist/lib/Target/X86/X86.td vendor/llvm/dist/lib/Target/X86/X86AsmPrinter.cpp vendor/llvm/dist/lib/Target/X86/X86ISelLowering.cpp vendor/llvm/dist/lib/Target/X86/X86InstrFragmentsSIMD.td vendor/llvm/dist/lib/Target/X86/X86Subtarget.cpp vendor/llvm/dist/lib/Target/X86/X86Subtarget.h vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp vendor/llvm/dist/lib/Transforms/Instrumentation/AddressSanitizer.cpp vendor/llvm/dist/lib/Transforms/Instrumentation/InstrProfiling.cpp vendor/llvm/dist/lib/Transforms/Instrumentation/MemorySanitizer.cpp vendor/llvm/dist/lib/Transforms/Scalar/EarlyCSE.cpp vendor/llvm/dist/lib/Transforms/Scalar/MemCpyOptimizer.cpp vendor/llvm/dist/lib/Transforms/Utils/Local.cpp vendor/llvm/dist/lib/Transforms/Utils/ValueMapper.cpp vendor/llvm/dist/lib/Transforms/Vectorize/SLPVectorizer.cpp vendor/llvm/dist/test/CodeGen/ARM/Windows/read-only-data.ll vendor/llvm/dist/test/CodeGen/ARM/Windows/structors.ll vendor/llvm/dist/test/CodeGen/ARM/alloc-no-stack-realign.ll vendor/llvm/dist/test/CodeGen/ARM/memcpy-inline.ll vendor/llvm/dist/test/CodeGen/ARM/sub-cmp-peephole.ll vendor/llvm/dist/test/CodeGen/X86/coff-comdat.ll vendor/llvm/dist/test/CodeGen/X86/dllexport-x86_64.ll vendor/llvm/dist/test/CodeGen/X86/dllexport.ll vendor/llvm/dist/test/CodeGen/X86/fold-vex.ll vendor/llvm/dist/test/CodeGen/X86/global-sections.ll vendor/llvm/dist/test/CodeGen/X86/pr15267.ll vendor/llvm/dist/test/CodeGen/X86/pshufb-mask-comments.ll vendor/llvm/dist/test/CodeGen/X86/win_cst_pool.ll vendor/llvm/dist/test/DebugInfo/COFF/asm.ll vendor/llvm/dist/test/DebugInfo/COFF/multifile.ll vendor/llvm/dist/test/DebugInfo/COFF/multifunction.ll vendor/llvm/dist/test/DebugInfo/COFF/simple.ll vendor/llvm/dist/test/DebugInfo/COFF/tail-call-without-lexical-scopes.ll vendor/llvm/dist/test/DebugInfo/X86/coff_debug_info_type.ll vendor/llvm/dist/test/Instrumentation/MemorySanitizer/atomics.ll vendor/llvm/dist/test/MC/COFF/bss_section.ll vendor/llvm/dist/test/MC/COFF/const-gv-with-rel-init.ll vendor/llvm/dist/test/MC/COFF/diff.s vendor/llvm/dist/test/MC/COFF/global_ctors_dtors.ll vendor/llvm/dist/test/MC/COFF/initialised-data.ll vendor/llvm/dist/test/MC/COFF/section-passthru-flags.s vendor/llvm/dist/test/MC/COFF/weak-symbol.ll vendor/llvm/dist/test/Transforms/EarlyCSE/basic.ll vendor/llvm/dist/test/Transforms/InstCombine/loadstore-metadata.ll vendor/llvm/dist/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll vendor/llvm/dist/tools/gold/gold-plugin.cpp Modified: vendor/llvm/dist/cmake/modules/AddLLVM.cmake ============================================================================== --- vendor/llvm/dist/cmake/modules/AddLLVM.cmake Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/cmake/modules/AddLLVM.cmake Sat Feb 14 12:17:42 2015 (r278752) @@ -334,11 +334,6 @@ function(llvm_add_library name) PREFIX "" ) endif() - if (MSVC) - set_target_properties(${name} - PROPERTIES - IMPORT_SUFFIX ".imp") - endif () endif() if(ARG_MODULE OR ARG_SHARED) Modified: vendor/llvm/dist/docs/ReleaseNotes.rst ============================================================================== --- vendor/llvm/dist/docs/ReleaseNotes.rst Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/docs/ReleaseNotes.rst Sat Feb 14 12:17:42 2015 (r278752) @@ -391,7 +391,8 @@ During this release the MIPS target has compiler has gained support for MIPS-II and MIPS-III; become ABI-compatible with GCC for big and little endian O32, N32, and N64; and is now able to compile the Linux kernel for 32-bit targets. Additionally, LLD now supports -microMIPS for the O32 ABI on little endian targets. +microMIPS for the O32 ABI on little endian targets, and code generation for +microMIPS is almost completely passing the test-suite. ABI ^^^ Modified: vendor/llvm/dist/include/llvm/CodeGen/MachineModuleInfo.h ============================================================================== --- vendor/llvm/dist/include/llvm/CodeGen/MachineModuleInfo.h Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/include/llvm/CodeGen/MachineModuleInfo.h Sat Feb 14 12:17:42 2015 (r278752) @@ -66,7 +66,6 @@ struct LandingPadInfo { MachineBasicBlock *LandingPadBlock; // Landing pad block. SmallVector BeginLabels; // Labels prior to invoke. SmallVector EndLabels; // Labels after invoke. - SmallVector ClauseLabels; // Labels for each clause. MCSymbol *LandingPadLabel; // Label at beginning of landing pad. const Function *Personality; // Personality function. std::vector TypeIds; // List of type ids (filters negative) @@ -331,11 +330,6 @@ public: /// void addCleanup(MachineBasicBlock *LandingPad); - /// Add a clause for a landing pad. Returns a new label for the clause. This - /// is used by EH schemes that have more than one landing pad. In this case, - /// each clause gets its own basic block. - MCSymbol *addClauseForLandingPad(MachineBasicBlock *LandingPad); - /// getTypeIDFor - Return the type id for the specified typeinfo. This is /// function wide. unsigned getTypeIDFor(const GlobalValue *TI); Modified: vendor/llvm/dist/include/llvm/CodeGen/RegAllocPBQP.h ============================================================================== --- vendor/llvm/dist/include/llvm/CodeGen/RegAllocPBQP.h Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/include/llvm/CodeGen/RegAllocPBQP.h Sat Feb 14 12:17:42 2015 (r278752) @@ -248,7 +248,7 @@ public: void setReductionState(ReductionState RS) { this->RS = RS; } void handleAddEdge(const MatrixMetadata& MD, bool Transpose) { - DeniedOpts += Transpose ? MD.getWorstCol() : MD.getWorstRow(); + DeniedOpts += Transpose ? MD.getWorstRow() : MD.getWorstCol(); const bool* UnsafeOpts = Transpose ? MD.getUnsafeCols() : MD.getUnsafeRows(); for (unsigned i = 0; i < NumOpts; ++i) @@ -256,7 +256,7 @@ public: } void handleRemoveEdge(const MatrixMetadata& MD, bool Transpose) { - DeniedOpts -= Transpose ? MD.getWorstCol() : MD.getWorstRow(); + DeniedOpts -= Transpose ? MD.getWorstRow() : MD.getWorstCol(); const bool* UnsafeOpts = Transpose ? MD.getUnsafeCols() : MD.getUnsafeRows(); for (unsigned i = 0; i < NumOpts; ++i) Modified: vendor/llvm/dist/include/llvm/IR/Metadata.h ============================================================================== --- vendor/llvm/dist/include/llvm/IR/Metadata.h Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/include/llvm/IR/Metadata.h Sat Feb 14 12:17:42 2015 (r278752) @@ -693,6 +693,7 @@ public: static AAMDNodes getMostGenericAA(const AAMDNodes &A, const AAMDNodes &B); static MDNode *getMostGenericFPMath(MDNode *A, MDNode *B); static MDNode *getMostGenericRange(MDNode *A, MDNode *B); + static MDNode *getMostGenericAliasScope(MDNode *A, MDNode *B); }; /// \brief Uniquable metadata node. Modified: vendor/llvm/dist/lib/Analysis/IPA/InlineCost.cpp ============================================================================== --- vendor/llvm/dist/lib/Analysis/IPA/InlineCost.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/Analysis/IPA/InlineCost.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -52,7 +52,7 @@ class CallAnalyzer : public InstVisitor< const TargetTransformInfo &TTI; /// The cache of @llvm.assume intrinsics. - AssumptionCache &AC; + AssumptionCacheTracker *ACT; // The called function. Function &F; @@ -146,8 +146,8 @@ class CallAnalyzer : public InstVisitor< public: CallAnalyzer(const DataLayout *DL, const TargetTransformInfo &TTI, - AssumptionCache &AC, Function &Callee, int Threshold) - : DL(DL), TTI(TTI), AC(AC), F(Callee), Threshold(Threshold), Cost(0), + AssumptionCacheTracker *ACT, Function &Callee, int Threshold) + : DL(DL), TTI(TTI), ACT(ACT), F(Callee), Threshold(Threshold), Cost(0), IsCallerRecursive(false), IsRecursiveCall(false), ExposesReturnsTwice(false), HasDynamicAlloca(false), ContainsNoDuplicateCall(false), HasReturn(false), HasIndirectBr(false), @@ -783,7 +783,7 @@ bool CallAnalyzer::visitCallSite(CallSit // during devirtualization and so we want to give it a hefty bonus for // inlining, but cap that bonus in the event that inlining wouldn't pan // out. Pretend to inline the function, with a custom threshold. - CallAnalyzer CA(DL, TTI, AC, *F, InlineConstants::IndirectCallThreshold); + CallAnalyzer CA(DL, TTI, ACT, *F, InlineConstants::IndirectCallThreshold); if (CA.analyzeCall(CS)) { // We were able to inline the indirect call! Subtract the cost from the // bonus we want to apply, but don't go below zero. @@ -1110,7 +1110,7 @@ bool CallAnalyzer::analyzeCall(CallSite // the ephemeral values multiple times (and they're completely determined by // the callee, so this is purely duplicate work). SmallPtrSet EphValues; - CodeMetrics::collectEphemeralValues(&F, &AC, EphValues); + CodeMetrics::collectEphemeralValues(&F, &ACT->getAssumptionCache(F), EphValues); // The worklist of live basic blocks in the callee *after* inlining. We avoid // adding basic blocks of the callee which can be proven to be dead for this @@ -1310,7 +1310,7 @@ InlineCost InlineCostAnalysis::getInline << "...\n"); CallAnalyzer CA(Callee->getDataLayout(), *TTI, - ACT->getAssumptionCache(*Callee), *Callee, Threshold); + ACT, *Callee, Threshold); bool ShouldInline = CA.analyzeCall(CS); DEBUG(CA.dump()); Modified: vendor/llvm/dist/lib/Analysis/TypeBasedAliasAnalysis.cpp ============================================================================== --- vendor/llvm/dist/lib/Analysis/TypeBasedAliasAnalysis.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/Analysis/TypeBasedAliasAnalysis.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -623,8 +623,8 @@ void Instruction::getAAMetadata(AAMDNode N.TBAA = getMetadata(LLVMContext::MD_tbaa); if (Merge) - N.Scope = - MDNode::intersect(N.Scope, getMetadata(LLVMContext::MD_alias_scope)); + N.Scope = MDNode::getMostGenericAliasScope( + N.Scope, getMetadata(LLVMContext::MD_alias_scope)); else N.Scope = getMetadata(LLVMContext::MD_alias_scope); Modified: vendor/llvm/dist/lib/Bitcode/Reader/BitReader.cpp ============================================================================== --- vendor/llvm/dist/lib/Bitcode/Reader/BitReader.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/Bitcode/Reader/BitReader.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -9,9 +9,11 @@ #include "llvm-c/BitReader.h" #include "llvm/Bitcode/ReaderWriter.h" +#include "llvm/IR/DiagnosticPrinter.h" #include "llvm/IR/LLVMContext.h" #include "llvm/IR/Module.h" #include "llvm/Support/MemoryBuffer.h" +#include "llvm/Support/raw_ostream.h" #include #include @@ -30,11 +32,20 @@ LLVMBool LLVMParseBitcodeInContext(LLVMC LLVMMemoryBufferRef MemBuf, LLVMModuleRef *OutModule, char **OutMessage) { - ErrorOr ModuleOrErr = - parseBitcodeFile(unwrap(MemBuf)->getMemBufferRef(), *unwrap(ContextRef)); - if (std::error_code EC = ModuleOrErr.getError()) { - if (OutMessage) - *OutMessage = strdup(EC.message().c_str()); + MemoryBufferRef Buf = unwrap(MemBuf)->getMemBufferRef(); + LLVMContext &Ctx = *unwrap(ContextRef); + + std::string Message; + raw_string_ostream Stream(Message); + DiagnosticPrinterRawOStream DP(Stream); + + ErrorOr ModuleOrErr = parseBitcodeFile( + Buf, Ctx, [&](const DiagnosticInfo &DI) { DI.print(DP); }); + if (ModuleOrErr.getError()) { + if (OutMessage) { + Stream.flush(); + *OutMessage = strdup(Message.c_str()); + } *OutModule = wrap((Module*)nullptr); return 1; } Modified: vendor/llvm/dist/lib/CodeGen/AsmPrinter/EHStreamer.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/AsmPrinter/EHStreamer.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/CodeGen/AsmPrinter/EHStreamer.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -121,8 +121,7 @@ computeActionsTable(const SmallVectorImp for (unsigned J = NumShared, M = TypeIds.size(); J != M; ++J) { int TypeID = TypeIds[J]; assert(-1 - TypeID < (int)FilterOffsets.size() && "Unknown filter id!"); - int ValueForTypeID = - isFilterEHSelector(TypeID) ? FilterOffsets[-1 - TypeID] : TypeID; + int ValueForTypeID = TypeID < 0 ? FilterOffsets[-1 - TypeID] : TypeID; unsigned SizeTypeID = getSLEB128Size(ValueForTypeID); int NextAction = SizeAction ? -(SizeAction + SizeTypeID) : 0; @@ -270,14 +269,14 @@ computeCallSiteTable(SmallVectorImplLandingPadLabel, FirstActions[P.PadIndex] }; // Try to merge with the previous call-site. SJLJ doesn't do this if (PreviousIsInvoke && !IsSJLJ) { CallSiteEntry &Prev = CallSites.back(); - if (Site.LPad == Prev.LPad && Site.Action == Prev.Action) { + if (Site.PadLabel == Prev.PadLabel && Site.Action == Prev.Action) { // Extend the range of the previous entry. Prev.EndLabel = Site.EndLabel; continue; @@ -577,15 +576,15 @@ void EHStreamer::emitExceptionTable() { // Offset of the landing pad, counted in 16-byte bundles relative to the // @LPStart address. - if (!S.LPad) { + if (!S.PadLabel) { if (VerboseAsm) Asm->OutStreamer.AddComment(" has no landing pad"); Asm->OutStreamer.EmitIntValue(0, 4/*size*/); } else { if (VerboseAsm) Asm->OutStreamer.AddComment(Twine(" jumps to ") + - S.LPad->LandingPadLabel->getName()); - Asm->EmitLabelDifference(S.LPad->LandingPadLabel, EHFuncBeginSym, 4); + S.PadLabel->getName()); + Asm->EmitLabelDifference(S.PadLabel, EHFuncBeginSym, 4); } // Offset of the first associated action record, relative to the start of @@ -682,7 +681,7 @@ void EHStreamer::emitTypeInfos(unsigned unsigned TypeID = *I; if (VerboseAsm) { --Entry; - if (isFilterEHSelector(TypeID)) + if (TypeID != 0) Asm->OutStreamer.AddComment("FilterInfo " + Twine(Entry)); } Modified: vendor/llvm/dist/lib/CodeGen/AsmPrinter/EHStreamer.h ============================================================================== --- vendor/llvm/dist/lib/CodeGen/AsmPrinter/EHStreamer.h Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/CodeGen/AsmPrinter/EHStreamer.h Sat Feb 14 12:17:42 2015 (r278752) @@ -23,8 +23,6 @@ class MachineModuleInfo; class MachineInstr; class MachineFunction; class AsmPrinter; -class MCSymbol; -class MCSymbolRefExpr; template class SmallVectorImpl; @@ -62,11 +60,11 @@ protected: /// Structure describing an entry in the call-site table. struct CallSiteEntry { // The 'try-range' is BeginLabel .. EndLabel. - MCSymbol *BeginLabel; // Null indicates the start of the function. - MCSymbol *EndLabel; // Null indicates the end of the function. + MCSymbol *BeginLabel; // zero indicates the start of the function. + MCSymbol *EndLabel; // zero indicates the end of the function. - // LPad contains the landing pad start labels. - const LandingPadInfo *LPad; // Null indicates that there is no landing pad. + // The landing pad starts at PadLabel. + MCSymbol *PadLabel; // zero indicates that there is no landing pad. unsigned Action; }; @@ -114,13 +112,6 @@ protected: virtual void emitTypeInfos(unsigned TTypeEncoding); - // Helpers for for identifying what kind of clause an EH typeid or selector - // corresponds to. Negative selectors are for filter clauses, the zero - // selector is for cleanups, and positive selectors are for catch clauses. - static bool isFilterEHSelector(int Selector) { return Selector < 0; } - static bool isCleanupEHSelector(int Selector) { return Selector == 0; } - static bool isCatchEHSelector(int Selector) { return Selector > 0; } - public: EHStreamer(AsmPrinter *A); virtual ~EHStreamer(); Modified: vendor/llvm/dist/lib/CodeGen/AsmPrinter/Win64Exception.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/AsmPrinter/Win64Exception.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/CodeGen/AsmPrinter/Win64Exception.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -99,156 +99,9 @@ void Win64Exception::endFunction(const M if (shouldEmitPersonality) { Asm->OutStreamer.PushSection(); - - // Emit an UNWIND_INFO struct describing the prologue. Asm->OutStreamer.EmitWinEHHandlerData(); - - // Emit either MSVC-compatible tables or the usual Itanium-style LSDA after - // the UNWIND_INFO struct. - if (Asm->MAI->getExceptionHandlingType() == ExceptionHandling::MSVC) { - const Function *Per = MMI->getPersonalities()[MMI->getPersonalityIndex()]; - if (Per->getName() == "__C_specific_handler") - emitCSpecificHandlerTable(); - else - report_fatal_error(Twine("unexpected personality function: ") + - Per->getName()); - } else { - emitExceptionTable(); - } - + emitExceptionTable(); Asm->OutStreamer.PopSection(); } Asm->OutStreamer.EmitWinCFIEndProc(); } - -const MCSymbolRefExpr *Win64Exception::createImageRel32(const MCSymbol *Value) { - return MCSymbolRefExpr::Create(Value, MCSymbolRefExpr::VK_COFF_IMGREL32, - Asm->OutContext); -} - -/// Emit the language-specific data that __C_specific_handler expects. This -/// handler lives in the x64 Microsoft C runtime and allows catching or cleaning -/// up after faults with __try, __except, and __finally. The typeinfo values -/// are not really RTTI data, but pointers to filter functions that return an -/// integer (1, 0, or -1) indicating how to handle the exception. For __finally -/// blocks and other cleanups, the landing pad label is zero, and the filter -/// function is actually a cleanup handler with the same prototype. A catch-all -/// entry is modeled with a null filter function field and a non-zero landing -/// pad label. -/// -/// Possible filter function return values: -/// EXCEPTION_EXECUTE_HANDLER (1): -/// Jump to the landing pad label after cleanups. -/// EXCEPTION_CONTINUE_SEARCH (0): -/// Continue searching this table or continue unwinding. -/// EXCEPTION_CONTINUE_EXECUTION (-1): -/// Resume execution at the trapping PC. -/// -/// Inferred table structure: -/// struct Table { -/// int NumEntries; -/// struct Entry { -/// imagerel32 LabelStart; -/// imagerel32 LabelEnd; -/// imagerel32 FilterOrFinally; // Zero means catch-all. -/// imagerel32 LabelLPad; // Zero means __finally. -/// } Entries[NumEntries]; -/// }; -void Win64Exception::emitCSpecificHandlerTable() { - const std::vector &PadInfos = MMI->getLandingPads(); - - // Simplifying assumptions for first implementation: - // - Cleanups are not implemented. - // - Filters are not implemented. - - // The Itanium LSDA table sorts similar landing pads together to simplify the - // actions table, but we don't need that. - SmallVector LandingPads; - LandingPads.reserve(PadInfos.size()); - for (const auto &LP : PadInfos) - LandingPads.push_back(&LP); - - // Compute label ranges for call sites as we would for the Itanium LSDA, but - // use an all zero action table because we aren't using these actions. - SmallVector FirstActions; - FirstActions.resize(LandingPads.size()); - SmallVector CallSites; - computeCallSiteTable(CallSites, LandingPads, FirstActions); - - MCSymbol *EHFuncBeginSym = - Asm->GetTempSymbol("eh_func_begin", Asm->getFunctionNumber()); - MCSymbol *EHFuncEndSym = - Asm->GetTempSymbol("eh_func_end", Asm->getFunctionNumber()); - - // Emit the number of table entries. - unsigned NumEntries = 0; - for (const CallSiteEntry &CSE : CallSites) { - if (!CSE.LPad) - continue; // Ignore gaps. - for (int Selector : CSE.LPad->TypeIds) { - // Ignore C++ filter clauses in SEH. - // FIXME: Implement cleanup clauses. - if (isCatchEHSelector(Selector)) - ++NumEntries; - } - } - Asm->OutStreamer.EmitIntValue(NumEntries, 4); - - // Emit the four-label records for each call site entry. The table has to be - // sorted in layout order, and the call sites should already be sorted. - for (const CallSiteEntry &CSE : CallSites) { - // Ignore gaps. Unlike the Itanium model, unwinding through a frame without - // an EH table entry will propagate the exception rather than terminating - // the program. - if (!CSE.LPad) - continue; - const LandingPadInfo *LPad = CSE.LPad; - - // Compute the label range. We may reuse the function begin and end labels - // rather than forming new ones. - const MCExpr *Begin = - createImageRel32(CSE.BeginLabel ? CSE.BeginLabel : EHFuncBeginSym); - const MCExpr *End; - if (CSE.EndLabel) { - // The interval is half-open, so we have to add one to include the return - // address of the last invoke in the range. - End = MCBinaryExpr::CreateAdd(createImageRel32(CSE.EndLabel), - MCConstantExpr::Create(1, Asm->OutContext), - Asm->OutContext); - } else { - End = createImageRel32(EHFuncEndSym); - } - - // These aren't really type info globals, they are actually pointers to - // filter functions ordered by selector. The zero selector is used for - // cleanups, so slot zero corresponds to selector 1. - const std::vector &SelectorToFilter = MMI->getTypeInfos(); - - // Do a parallel iteration across typeids and clause labels, skipping filter - // clauses. - assert(LPad->TypeIds.size() == LPad->ClauseLabels.size()); - for (size_t I = 0, E = LPad->TypeIds.size(); I < E; ++I) { - // AddLandingPadInfo stores the clauses in reverse, but there is a FIXME - // to change that. - int Selector = LPad->TypeIds[E - I - 1]; - MCSymbol *ClauseLabel = LPad->ClauseLabels[I]; - - // Ignore C++ filter clauses in SEH. - // FIXME: Implement cleanup clauses. - if (!isCatchEHSelector(Selector)) - continue; - - Asm->OutStreamer.EmitValue(Begin, 4); - Asm->OutStreamer.EmitValue(End, 4); - if (isCatchEHSelector(Selector)) { - assert(unsigned(Selector - 1) < SelectorToFilter.size()); - const GlobalValue *TI = SelectorToFilter[Selector - 1]; - if (TI) // Emit the filter function pointer. - Asm->OutStreamer.EmitValue(createImageRel32(Asm->getSymbol(TI)), 4); - else // Otherwise, this is a "catch i8* null", or catch all. - Asm->OutStreamer.EmitIntValue(0, 4); - } - Asm->OutStreamer.EmitValue(createImageRel32(ClauseLabel), 4); - } - } -} Modified: vendor/llvm/dist/lib/CodeGen/AsmPrinter/Win64Exception.h ============================================================================== --- vendor/llvm/dist/lib/CodeGen/AsmPrinter/Win64Exception.h Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/CodeGen/AsmPrinter/Win64Exception.h Sat Feb 14 12:17:42 2015 (r278752) @@ -29,10 +29,6 @@ class Win64Exception : public EHStreamer /// Per-function flag to indicate if frame moves info should be emitted. bool shouldEmitMoves; - void emitCSpecificHandlerTable(); - - const MCSymbolRefExpr *createImageRel32(const MCSymbol *Value); - public: //===--------------------------------------------------------------------===// // Main entry points. Modified: vendor/llvm/dist/lib/CodeGen/MachineModuleInfo.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/MachineModuleInfo.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/CodeGen/MachineModuleInfo.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -452,14 +452,6 @@ void MachineModuleInfo::addCleanup(Machi LP.TypeIds.push_back(0); } -MCSymbol * -MachineModuleInfo::addClauseForLandingPad(MachineBasicBlock *LandingPad) { - MCSymbol *ClauseLabel = Context.CreateTempSymbol(); - LandingPadInfo &LP = getOrCreateLandingPadInfo(LandingPad); - LP.ClauseLabels.push_back(ClauseLabel); - return ClauseLabel; -} - /// TidyLandingPads - Remap landing pad labels and remove any deleted landing /// pads. void MachineModuleInfo::TidyLandingPads(DenseMap *LPMap) { Modified: vendor/llvm/dist/lib/CodeGen/Passes.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/Passes.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/CodeGen/Passes.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -449,9 +449,9 @@ void TargetPassConfig::addPassesToHandle case ExceptionHandling::DwarfCFI: case ExceptionHandling::ARM: case ExceptionHandling::ItaniumWinEH: - case ExceptionHandling::MSVC: // FIXME: Needs preparation. addPass(createDwarfEHPass(TM)); break; + case ExceptionHandling::MSVC: // FIXME: Add preparation. case ExceptionHandling::None: addPass(createLowerInvokePass()); Modified: vendor/llvm/dist/lib/CodeGen/SelectionDAG/DAGCombiner.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -6544,19 +6544,15 @@ SDValue DAGCombiner::visitBITCAST(SDNode // If the input is a constant, let getNode fold it. if (isa(N0) || isa(N0)) { - SDValue Res = DAG.getNode(ISD::BITCAST, SDLoc(N), VT, N0); - if (Res.getNode() != N) { - if (!LegalOperations || - TLI.isOperationLegal(Res.getNode()->getOpcode(), VT)) - return Res; - - // Folding it resulted in an illegal node, and it's too late to - // do that. Clean up the old node and forego the transformation. - // Ideally this won't happen very often, because instcombine - // and the earlier dagcombine runs (where illegal nodes are - // permitted) should have folded most of them already. - deleteAndRecombine(Res.getNode()); - } + // If we can't allow illegal operations, we need to check that this is just + // a fp -> int or int -> conversion and that the resulting operation will + // be legal. + if (!LegalOperations || + (isa(N0) && VT.isFloatingPoint() && !VT.isVector() && + TLI.isOperationLegal(ISD::ConstantFP, VT)) || + (isa(N0) && VT.isInteger() && !VT.isVector() && + TLI.isOperationLegal(ISD::Constant, VT))) + return DAG.getNode(ISD::BITCAST, SDLoc(N), VT, N0); } // (conv (conv x, t1), t2) -> (conv x, t2) Modified: vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -390,7 +390,8 @@ SDValue VectorLegalizer::Promote(SDValue if (Op.getOperand(j) .getValueType() .getVectorElementType() - .isFloatingPoint()) + .isFloatingPoint() && + NVT.isVector() && NVT.getVectorElementType().isFloatingPoint()) Operands[j] = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Op.getOperand(j)); else Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j)); @@ -399,8 +400,9 @@ SDValue VectorLegalizer::Promote(SDValue } Op = DAG.getNode(Op.getOpcode(), dl, NVT, Operands); - if (VT.isFloatingPoint() || - (VT.isVector() && VT.getVectorElementType().isFloatingPoint())) + if ((VT.isFloatingPoint() && NVT.isFloatingPoint()) || + (VT.isVector() && VT.getVectorElementType().isFloatingPoint() && + NVT.isVector() && NVT.getVectorElementType().isFloatingPoint())) return DAG.getNode(ISD::FP_ROUND, dl, VT, Op, DAG.getIntPtrConstant(0)); else return DAG.getNode(ISD::BITCAST, dl, VT, Op); @@ -554,9 +556,9 @@ SDValue VectorLegalizer::ExpandLoad(SDVa BitOffset += SrcEltBits; if (BitOffset >= WideBits) { WideIdx++; - Offset -= WideBits; - if (Offset > 0) { - ShAmt = DAG.getConstant(SrcEltBits - Offset, + BitOffset -= WideBits; + if (BitOffset > 0) { + ShAmt = DAG.getConstant(SrcEltBits - BitOffset, TLI.getShiftAmountTy(WideVT)); Hi = DAG.getNode(ISD::SHL, dl, WideVT, LoadVals[WideIdx], ShAmt); Hi = DAG.getNode(ISD::AND, dl, WideVT, Hi, SrcEltBitMask); Modified: vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -2071,14 +2071,10 @@ void SelectionDAGBuilder::visitLandingPa // Get the two live-in registers as SDValues. The physregs have already been // copied into virtual registers. SDValue Ops[2]; - if (FuncInfo.ExceptionPointerVirtReg) { - Ops[0] = DAG.getZExtOrTrunc( - DAG.getCopyFromReg(DAG.getEntryNode(), getCurSDLoc(), - FuncInfo.ExceptionPointerVirtReg, TLI.getPointerTy()), - getCurSDLoc(), ValueVTs[0]); - } else { - Ops[0] = DAG.getConstant(0, TLI.getPointerTy()); - } + Ops[0] = DAG.getZExtOrTrunc( + DAG.getCopyFromReg(DAG.getEntryNode(), getCurSDLoc(), + FuncInfo.ExceptionPointerVirtReg, TLI.getPointerTy()), + getCurSDLoc(), ValueVTs[0]); Ops[1] = DAG.getZExtOrTrunc( DAG.getCopyFromReg(DAG.getEntryNode(), getCurSDLoc(), FuncInfo.ExceptionSelectorVirtReg, TLI.getPointerTy()), @@ -2090,27 +2086,6 @@ void SelectionDAGBuilder::visitLandingPa setValue(&LP, Res); } -unsigned -SelectionDAGBuilder::visitLandingPadClauseBB(GlobalValue *ClauseGV, - MachineBasicBlock *LPadBB) { - SDValue Chain = getControlRoot(); - - // Get the typeid that we will dispatch on later. - const TargetLowering &TLI = DAG.getTargetLoweringInfo(); - const TargetRegisterClass *RC = TLI.getRegClassFor(TLI.getPointerTy()); - unsigned VReg = FuncInfo.MF->getRegInfo().createVirtualRegister(RC); - unsigned TypeID = DAG.getMachineFunction().getMMI().getTypeIDFor(ClauseGV); - SDValue Sel = DAG.getConstant(TypeID, TLI.getPointerTy()); - Chain = DAG.getCopyToReg(Chain, getCurSDLoc(), VReg, Sel); - - // Branch to the main landing pad block. - MachineBasicBlock *ClauseMBB = FuncInfo.MBB; - ClauseMBB->addSuccessor(LPadBB); - DAG.setRoot(DAG.getNode(ISD::BR, getCurSDLoc(), MVT::Other, Chain, - DAG.getBasicBlock(LPadBB))); - return VReg; -} - /// handleSmallSwitchCaseRange - Emit a series of specific tests (suitable for /// small case ranges). bool SelectionDAGBuilder::handleSmallSwitchRange(CaseRec& CR, Modified: vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h ============================================================================== --- vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Sat Feb 14 12:17:42 2015 (r278752) @@ -713,8 +713,6 @@ public: void visitJumpTable(JumpTable &JT); void visitJumpTableHeader(JumpTable &JT, JumpTableHeader &JTH, MachineBasicBlock *SwitchBB); - unsigned visitLandingPadClauseBB(GlobalValue *ClauseGV, - MachineBasicBlock *LPadMBB); private: // These all get lowered before this pass. Modified: vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -19,7 +19,6 @@ #include "llvm/Analysis/AliasAnalysis.h" #include "llvm/Analysis/BranchProbabilityInfo.h" #include "llvm/Analysis/CFG.h" -#include "llvm/CodeGen/Analysis.h" #include "llvm/CodeGen/FastISel.h" #include "llvm/CodeGen/FunctionLoweringInfo.h" #include "llvm/CodeGen/GCMetadata.h" @@ -41,7 +40,6 @@ #include "llvm/IR/Intrinsics.h" #include "llvm/IR/LLVMContext.h" #include "llvm/IR/Module.h" -#include "llvm/MC/MCAsmInfo.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" @@ -909,8 +907,6 @@ void SelectionDAGISel::DoInstructionSele void SelectionDAGISel::PrepareEHLandingPad() { MachineBasicBlock *MBB = FuncInfo->MBB; - const TargetRegisterClass *PtrRC = TLI->getRegClassFor(TLI->getPointerTy()); - // Add a label to mark the beginning of the landing pad. Deletion of the // landing pad can thus be detected via the MachineModuleInfo. MCSymbol *Label = MF->getMMI().addLandingPad(MBB); @@ -922,66 +918,8 @@ void SelectionDAGISel::PrepareEHLandingP BuildMI(*MBB, FuncInfo->InsertPt, SDB->getCurDebugLoc(), II) .addSym(Label); - if (TM.getMCAsmInfo()->getExceptionHandlingType() == - ExceptionHandling::MSVC) { - // Make virtual registers and a series of labels that fill in values for the - // clauses. - auto &RI = MF->getRegInfo(); - FuncInfo->ExceptionSelectorVirtReg = RI.createVirtualRegister(PtrRC); - - // Get all invoke BBs that will unwind into the clause BBs. - SmallVector InvokeBBs(MBB->pred_begin(), - MBB->pred_end()); - - // Emit separate machine basic blocks with separate labels for each clause - // before the main landing pad block. - const BasicBlock *LLVMBB = MBB->getBasicBlock(); - const LandingPadInst *LPadInst = LLVMBB->getLandingPadInst(); - MachineInstrBuilder SelectorPHI = BuildMI( - *MBB, MBB->begin(), SDB->getCurDebugLoc(), TII->get(TargetOpcode::PHI), - FuncInfo->ExceptionSelectorVirtReg); - for (unsigned I = 0, E = LPadInst->getNumClauses(); I != E; ++I) { - MachineBasicBlock *ClauseBB = MF->CreateMachineBasicBlock(LLVMBB); - MF->insert(MBB, ClauseBB); - - // Add the edge from the invoke to the clause. - for (MachineBasicBlock *InvokeBB : InvokeBBs) - InvokeBB->addSuccessor(ClauseBB); - - // Mark the clause as a landing pad or MI passes will delete it. - ClauseBB->setIsLandingPad(); - - GlobalValue *ClauseGV = ExtractTypeInfo(LPadInst->getClause(I)); - - // Start the BB with a label. - MCSymbol *ClauseLabel = MF->getMMI().addClauseForLandingPad(MBB); - BuildMI(*ClauseBB, ClauseBB->begin(), SDB->getCurDebugLoc(), II) - .addSym(ClauseLabel); - - // Construct a simple BB that defines a register with the typeid constant. - FuncInfo->MBB = ClauseBB; - FuncInfo->InsertPt = ClauseBB->end(); - unsigned VReg = SDB->visitLandingPadClauseBB(ClauseGV, MBB); - CurDAG->setRoot(SDB->getRoot()); - SDB->clear(); - CodeGenAndEmitDAG(); - - // Add the typeid virtual register to the phi in the main landing pad. - SelectorPHI.addReg(VReg).addMBB(ClauseBB); - } - - // Remove the edge from the invoke to the lpad. - for (MachineBasicBlock *InvokeBB : InvokeBBs) - InvokeBB->removeSuccessor(MBB); - - // Restore FuncInfo back to its previous state and select the main landing - // pad block. - FuncInfo->MBB = MBB; - FuncInfo->InsertPt = MBB->end(); - return; - } - // Mark exception register as live in. + const TargetRegisterClass *PtrRC = TLI->getRegClassFor(TLI->getPointerTy()); if (unsigned Reg = TLI->getExceptionPointerRegister()) FuncInfo->ExceptionPointerVirtReg = MBB->addLiveIn(Reg, PtrRC); Modified: vendor/llvm/dist/lib/IR/DebugInfo.cpp ============================================================================== --- vendor/llvm/dist/lib/IR/DebugInfo.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/IR/DebugInfo.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -525,12 +525,15 @@ bool DISubprogram::Verify() const { while ((IA = DL.getInlinedAt())) DL = DebugLoc::getFromDILocation(IA); DL.getScopeAndInlinedAt(Scope, IA); + if (!Scope) + return false; assert(!IA); while (!DIDescriptor(Scope).isSubprogram()) { DILexicalBlockFile D(Scope); Scope = D.isLexicalBlockFile() ? D.getScope() : DebugLoc::getFromDILexicalBlock(Scope).getScope(); + assert(Scope && "lexical block file has no scope"); } if (!DISubprogram(Scope).describes(F)) return false; Modified: vendor/llvm/dist/lib/IR/Metadata.cpp ============================================================================== --- vendor/llvm/dist/lib/IR/Metadata.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/IR/Metadata.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -826,6 +826,28 @@ MDNode *MDNode::intersect(MDNode *A, MDN return getOrSelfReference(A->getContext(), MDs); } +MDNode *MDNode::getMostGenericAliasScope(MDNode *A, MDNode *B) { + if (!A || !B) + return nullptr; + + SmallVector MDs(B->op_begin(), B->op_end()); + for (unsigned i = 0, ie = A->getNumOperands(); i != ie; ++i) { + Metadata *MD = A->getOperand(i); + bool insert = true; + for (unsigned j = 0, je = B->getNumOperands(); j != je; ++j) + if (MD == B->getOperand(j)) { + insert = false; + break; + } + if (insert) + MDs.push_back(MD); + } + + // FIXME: This preserves long-standing behaviour, but is it really the right + // behaviour? Or was that an unintended side-effect of node uniquing? + return getOrSelfReference(A->getContext(), MDs); +} + MDNode *MDNode::getMostGenericFPMath(MDNode *A, MDNode *B) { if (!A || !B) return nullptr; Modified: vendor/llvm/dist/lib/IR/Type.cpp ============================================================================== --- vendor/llvm/dist/lib/IR/Type.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/IR/Type.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -708,9 +708,10 @@ VectorType::VectorType(Type *ElType, uns VectorType *VectorType::get(Type *elementType, unsigned NumElements) { Type *ElementType = const_cast(elementType); assert(NumElements > 0 && "#Elements of a VectorType must be greater than 0"); - assert(isValidElementType(ElementType) && - "Elements of a VectorType must be a primitive type"); - + assert(isValidElementType(ElementType) && "Element type of a VectorType must " + "be an integer, floating point, or " + "pointer type."); + LLVMContextImpl *pImpl = ElementType->getContext().pImpl; VectorType *&Entry = ElementType->getContext().pImpl ->VectorTypes[std::make_pair(ElementType, NumElements)]; Modified: vendor/llvm/dist/lib/MC/MCSectionCOFF.cpp ============================================================================== --- vendor/llvm/dist/lib/MC/MCSectionCOFF.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/MC/MCSectionCOFF.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -47,6 +47,10 @@ void MCSectionCOFF::PrintSwitchToSection } OS << "\t.section\t" << getSectionName() << ",\""; + if (getCharacteristics() & COFF::IMAGE_SCN_CNT_INITIALIZED_DATA) + OS << 'd'; + if (getCharacteristics() & COFF::IMAGE_SCN_CNT_UNINITIALIZED_DATA) + OS << 'b'; if (getCharacteristics() & COFF::IMAGE_SCN_MEM_EXECUTE) OS << 'x'; if (getCharacteristics() & COFF::IMAGE_SCN_MEM_WRITE) @@ -55,10 +59,6 @@ void MCSectionCOFF::PrintSwitchToSection OS << 'r'; else OS << 'y'; - if (getCharacteristics() & COFF::IMAGE_SCN_CNT_INITIALIZED_DATA) - OS << 'd'; - if (getCharacteristics() & COFF::IMAGE_SCN_CNT_UNINITIALIZED_DATA) - OS << 'b'; if (getCharacteristics() & COFF::IMAGE_SCN_LNK_REMOVE) OS << 'n'; if (getCharacteristics() & COFF::IMAGE_SCN_MEM_SHARED) Modified: vendor/llvm/dist/lib/MC/WinCOFFObjectWriter.cpp ============================================================================== --- vendor/llvm/dist/lib/MC/WinCOFFObjectWriter.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/MC/WinCOFFObjectWriter.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -710,17 +710,22 @@ void WinCOFFObjectWriter::RecordRelocati CrossSection = &Symbol.getSection() != &B->getSection(); // Offset of the symbol in the section - int64_t a = Layout.getSymbolOffset(&B_SD); + int64_t OffsetOfB = Layout.getSymbolOffset(&B_SD); - // Offset of the relocation in the section - int64_t b = Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); - - FixedValue = b - a; // In the case where we have SymbA and SymB, we just need to store the delta // between the two symbols. Update FixedValue to account for the delta, and // skip recording the relocation. - if (!CrossSection) + if (!CrossSection) { + int64_t OffsetOfA = Layout.getSymbolOffset(&A_SD); + FixedValue = (OffsetOfA - OffsetOfB) + Target.getConstant(); return; + } + + // Offset of the relocation in the section + int64_t OffsetOfRelocation = + Layout.getFragmentOffset(Fragment) + Fixup.getOffset(); + + FixedValue = OffsetOfRelocation - OffsetOfB; } else { FixedValue = Target.getConstant(); } Modified: vendor/llvm/dist/lib/Support/regcomp.c ============================================================================== --- vendor/llvm/dist/lib/Support/regcomp.c Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/Support/regcomp.c Sat Feb 14 12:17:42 2015 (r278752) @@ -49,6 +49,14 @@ #include "regcclass.h" #include "regcname.h" +#include "llvm/Config/config.h" +#if HAVE_STDINT_H +#include +#else +/* Pessimistically bound memory use */ +#define SIZE_MAX UINT_MAX +#endif + /* * parse structure, passed up and down to avoid global variables and * other clumsinesses @@ -1069,6 +1077,8 @@ allocset(struct parse *p) p->ncsalloc += CHAR_BIT; nc = p->ncsalloc; + if (nc > SIZE_MAX / sizeof(cset)) + goto nomem; assert(nc % CHAR_BIT == 0); nbytes = nc / CHAR_BIT * css; @@ -1412,6 +1422,11 @@ enlarge(struct parse *p, sopno size) if (p->ssize >= size) return; + if ((unsigned long)size > SIZE_MAX / sizeof(sop)) { + SETERROR(REG_ESPACE); + return; + } + sp = (sop *)realloc(p->strip, size*sizeof(sop)); if (sp == NULL) { SETERROR(REG_ESPACE); @@ -1428,6 +1443,12 @@ static void stripsnug(struct parse *p, struct re_guts *g) { g->nstates = p->slen; + if ((unsigned long)p->slen > SIZE_MAX / sizeof(sop)) { + g->strip = p->strip; + SETERROR(REG_ESPACE); + return; + } + g->strip = (sop *)realloc((char *)p->strip, p->slen * sizeof(sop)); if (g->strip == NULL) { SETERROR(REG_ESPACE); Modified: vendor/llvm/dist/lib/Target/AArch64/AArch64ISelLowering.cpp ============================================================================== --- vendor/llvm/dist/lib/Target/AArch64/AArch64ISelLowering.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/Target/AArch64/AArch64ISelLowering.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -6287,6 +6287,8 @@ static SDValue EmitVectorComparison(SDVa AArch64CC::CondCode CC, bool NoNans, EVT VT, SDLoc dl, SelectionDAG &DAG) { EVT SrcVT = LHS.getValueType(); + assert(VT.getSizeInBits() == SrcVT.getSizeInBits() && + "function only supposed to emit natural comparisons"); BuildVectorSDNode *BVN = dyn_cast(RHS.getNode()); APInt CnstBits(VT.getSizeInBits(), 0); @@ -6381,13 +6383,15 @@ SDValue AArch64TargetLowering::LowerVSET ISD::CondCode CC = cast(Op.getOperand(2))->get(); SDValue LHS = Op.getOperand(0); SDValue RHS = Op.getOperand(1); + EVT CmpVT = LHS.getValueType().changeVectorElementTypeToInteger(); SDLoc dl(Op); if (LHS.getValueType().getVectorElementType().isInteger()) { assert(LHS.getValueType() == RHS.getValueType()); AArch64CC::CondCode AArch64CC = changeIntCCToAArch64CC(CC); - return EmitVectorComparison(LHS, RHS, AArch64CC, false, Op.getValueType(), - dl, DAG); + SDValue Cmp = + EmitVectorComparison(LHS, RHS, AArch64CC, false, CmpVT, dl, DAG); + return DAG.getSExtOrTrunc(Cmp, dl, Op.getValueType()); } assert(LHS.getValueType().getVectorElementType() == MVT::f32 || @@ -6401,19 +6405,21 @@ SDValue AArch64TargetLowering::LowerVSET bool NoNaNs = getTargetMachine().Options.NoNaNsFPMath; SDValue Cmp = - EmitVectorComparison(LHS, RHS, CC1, NoNaNs, Op.getValueType(), dl, DAG); + EmitVectorComparison(LHS, RHS, CC1, NoNaNs, CmpVT, dl, DAG); if (!Cmp.getNode()) return SDValue(); if (CC2 != AArch64CC::AL) { SDValue Cmp2 = - EmitVectorComparison(LHS, RHS, CC2, NoNaNs, Op.getValueType(), dl, DAG); + EmitVectorComparison(LHS, RHS, CC2, NoNaNs, CmpVT, dl, DAG); if (!Cmp2.getNode()) return SDValue(); - Cmp = DAG.getNode(ISD::OR, dl, Cmp.getValueType(), Cmp, Cmp2); + Cmp = DAG.getNode(ISD::OR, dl, CmpVT, Cmp, Cmp2); } + Cmp = DAG.getSExtOrTrunc(Cmp, dl, Op.getValueType()); + if (ShouldInvert) return Cmp = DAG.getNOT(dl, Cmp, Cmp.getValueType()); Modified: vendor/llvm/dist/lib/Target/ARM/ARMBaseInstrInfo.cpp ============================================================================== --- vendor/llvm/dist/lib/Target/ARM/ARMBaseInstrInfo.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/Target/ARM/ARMBaseInstrInfo.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -2400,7 +2400,8 @@ optimizeCompareInstr(MachineInstr *CmpIn else if (MI->getParent() != CmpInstr->getParent() || CmpValue != 0) { // Conservatively refuse to convert an instruction which isn't in the same // BB as the comparison. - // For CMPri, we need to check Sub, thus we can't return here. + // For CMPri w/ CmpValue != 0, a Sub may still be a candidate. + // Thus we cannot return here. if (CmpInstr->getOpcode() == ARM::CMPri || CmpInstr->getOpcode() == ARM::t2CMPri) MI = nullptr; @@ -2479,8 +2480,8 @@ optimizeCompareInstr(MachineInstr *CmpIn case ARM::t2EORrr: case ARM::t2EORri: { // Scan forward for the use of CPSR - // When checking against MI: if it's a conditional code requires - // checking of V bit, then this is not safe to do. + // When checking against MI: if it's a conditional code that requires + // checking of the V bit or C bit, then this is not safe to do. // It is safe to remove CmpInstr if CPSR is redefined or killed. // If we are done with the basic block, we need to check whether CPSR is // live-out. @@ -2547,19 +2548,30 @@ optimizeCompareInstr(MachineInstr *CmpIn OperandsToUpdate.push_back( std::make_pair(&((*I).getOperand(IO - 1)), NewCC)); } - } else + } else { + // No Sub, so this is x = y, z; cmp x, 0. switch (CC) { - default: + case ARMCC::EQ: // Z + case ARMCC::NE: // Z + case ARMCC::MI: // N + case ARMCC::PL: // N + case ARMCC::AL: // none // CPSR can be used multiple times, we should continue. break; - case ARMCC::VS: - case ARMCC::VC: - case ARMCC::GE: - case ARMCC::LT: - case ARMCC::GT: - case ARMCC::LE: + case ARMCC::HS: // C + case ARMCC::LO: // C + case ARMCC::VS: // V + case ARMCC::VC: // V + case ARMCC::HI: // C Z + case ARMCC::LS: // C Z + case ARMCC::GE: // N V + case ARMCC::LT: // N V + case ARMCC::GT: // Z N V + case ARMCC::LE: // Z N V + // The instruction uses the V bit or C bit which is not safe. return false; } + } } } Modified: vendor/llvm/dist/lib/Target/ARM/ARMISelLowering.cpp ============================================================================== --- vendor/llvm/dist/lib/Target/ARM/ARMISelLowering.cpp Sat Feb 14 11:47:40 2015 (r278751) +++ vendor/llvm/dist/lib/Target/ARM/ARMISelLowering.cpp Sat Feb 14 12:17:42 2015 (r278752) @@ -565,7 +565,6 @@ ARMTargetLowering::ARMTargetLowering(con setTargetDAGCombine(ISD::FP_TO_SINT); setTargetDAGCombine(ISD::FP_TO_UINT); setTargetDAGCombine(ISD::FDIV); - setTargetDAGCombine(ISD::LOAD); // It is legal to extload from v4i8 to v4i16 or v4i32. *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***