From owner-p4-projects@FreeBSD.ORG Thu Oct 19 22:13:15 2006 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 6BBE716A587; Thu, 19 Oct 2006 22:13:15 +0000 (UTC) X-Original-To: perforce@freebsd.org Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 2EE5B16A585 for ; Thu, 19 Oct 2006 22:13:15 +0000 (UTC) (envelope-from cognet@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 6434943D45 for ; Thu, 19 Oct 2006 22:13:14 +0000 (GMT) (envelope-from cognet@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.6/8.13.6) with ESMTP id k9JMDEpN051122 for ; Thu, 19 Oct 2006 22:13:14 GMT (envelope-from cognet@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.6/8.13.4/Submit) id k9JMDETE051118 for perforce@freebsd.org; Thu, 19 Oct 2006 22:13:14 GMT (envelope-from cognet@freebsd.org) Date: Thu, 19 Oct 2006 22:13:14 GMT Message-Id: <200610192213.k9JMDETE051118@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to cognet@freebsd.org using -f From: Olivier Houchard To: Perforce Change Reviews Cc: Subject: PERFORCE change 108117 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 19 Oct 2006 22:13:15 -0000 http://perforce.freebsd.org/chv.cgi?CH=108117 Change 108117 by cognet@cognet on 2006/10/19 22:13:02 Hopefully get the endianness write with pci space operations this time. Write the AHB=>PCI addresses the right way. Affected files ... .. //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425_pci.c#9 edit .. //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425_pci_space.c#5 edit Differences ... ==== //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425_pci.c#9 (text+ko) ==== @@ -93,11 +93,20 @@ return (0); } +void +ixp425_pci_conf_reg_write(struct ixppcib_softc *sc, uint32_t reg, + uint32_t data) +{ + PCI_CSR_WRITE_4(sc, + PCI_CRP_AD_CBE, ((reg & ~3) | COMMAND_CRP_WRITE)); + PCI_CSR_WRITE_4(sc, + PCI_CRP_AD_WDATA, data); + printf("DID IT %x %x\n", reg, data); +} static int ixppcib_attach(device_t dev) { int rid; - uint32_t reg; struct ixppcib_softc *sc; sc = device_get_softc(dev); @@ -145,20 +154,20 @@ panic("ixppcib_probe: failed to set up memory rman"); } - device_add_child(dev, "pci", -1); /* * PCI->AHB address translation * begin at the physical memory start + OFFSET */ #define AHB_OFFSET 0x10000000UL - reg = (AHB_OFFSET + 0x00000000) >> 0; - reg |= (AHB_OFFSET + 0x01000000) >> 8; - reg |= (AHB_OFFSET + 0x02000000) >> 16; - reg |= (AHB_OFFSET + 0x03000000) >> 24; - PCI_CSR_WRITE_4(sc, PCI_AHBMEMBASE, reg); + PCI_CSR_WRITE_4(sc, PCI_AHBMEMBASE, + (AHB_OFFSET & 0xFF000000) + + ((AHB_OFFSET & 0xFF000000) >> 8) + + ((AHB_OFFSET & 0xFF000000) >> 16) + + ((AHB_OFFSET & 0xFF000000) >> 24) + + 0x00010203); #define IXPPCIB_WRITE_CONF(sc, reg, val) \ - ixppcib_write_config(dev, 0, 0, 0, (reg), (val), 4) + ixp425_pci_conf_reg_write(sc, reg, val) /* Write Mapping registers PCI Configuration Registers */ /* Base Address 0 - 3 */ IXPPCIB_WRITE_CONF(sc, PCI_MAPREG_BAR0, AHB_OFFSET + 0x00000000); @@ -194,6 +203,7 @@ */ DELAY(50000); + device_add_child(dev, "pci", -1); return (bus_generic_attach(dev)); } ==== //depot/projects/arm/src/sys/arm/xscale/ixp425/ixp425_pci_space.c#5 (text+ko) ==== @@ -163,22 +163,22 @@ #ifdef __ARMEB__ /* read (single) */ - .bs_r_1 = _pci_mem_bs_r_1, - .bs_r_2 = _pci_mem_bs_r_2, - .bs_r_4 = _pci_mem_bs_r_4, + .bs_r_1_s = _pci_mem_bs_r_1, + .bs_r_2_s = _pci_mem_bs_r_2, + .bs_r_4_s = _pci_mem_bs_r_4, - .bs_r_1_s = ixp425_pci_mem_bs_r_1, - .bs_r_2_s = ixp425_pci_mem_bs_r_2, - .bs_r_4_s = ixp425_pci_mem_bs_r_4, + .bs_r_1 = ixp425_pci_mem_bs_r_1, + .bs_r_2 = ixp425_pci_mem_bs_r_2, + .bs_r_4 = ixp425_pci_mem_bs_r_4, /* write (single) */ - .bs_w_1 = _pci_mem_bs_w_1, - .bs_w_2 = _pci_mem_bs_w_2, - .bs_w_4 = _pci_mem_bs_w_4, + .bs_w_1_s = _pci_mem_bs_w_1, + .bs_w_2_s = _pci_mem_bs_w_2, + .bs_w_4_s = _pci_mem_bs_w_4, - .bs_w_1_s = ixp425_pci_mem_bs_w_1, - .bs_w_2_s = ixp425_pci_mem_bs_w_2, - .bs_w_4_s = ixp425_pci_mem_bs_w_4, + .bs_w_1 = ixp425_pci_mem_bs_w_1, + .bs_w_2 = ixp425_pci_mem_bs_w_2, + .bs_w_4 = ixp425_pci_mem_bs_w_4, #else /* read (single) */ .bs_r_1 = ixp425_pci_mem_bs_r_1, @@ -460,7 +460,7 @@ static u_int16_t _pci_mem_bs_r_2(void *v, bus_space_handle_t ioh, bus_size_t off) { - return ixp425_pci_mem_bs_r_2(v, ioh, off); + return (ixp425_pci_mem_bs_r_2(v, ioh, off)); } static u_int32_t @@ -469,7 +469,7 @@ u_int32_t data; data = ixp425_pci_mem_bs_r_4(v, ioh, off); - return (data); + return (htole32(data)); } static void @@ -490,7 +490,7 @@ _pci_mem_bs_w_4(void *v, bus_space_handle_t ioh, bus_size_t off, u_int32_t val) { - ixp425_pci_mem_bs_w_4(v, ioh, off, val); + ixp425_pci_mem_bs_w_4(v, ioh, off, htole32(val)); } #endif /* __ARMEB__ */