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From: Olivier Houchard <cognet@FreeBSD.org>
Date: Sat, 26 Feb 2005 18:59:01 +0000 (UTC)
To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org,
	cvs-all@FreeBSD.org
X-FreeBSD-CVS-Branch: HEAD
Subject: cvs commit: src/sys/arm/include machdep.h pmap.h sysarch.h
 src/sys/arm/arm cpufunc_asm.S genassym.c machdep.c pmap.c swtch.S
 src/sys/arm/xscale std.xscale src/sys/arm/xscale/i80321 std.i80321
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cognet      2005-02-26 18:59:01 UTC

  FreeBSD src repository

  Modified files:
    sys/arm/include      sysarch.h pmap.h machdep.h 
    sys/arm/arm          cpufunc_asm.S genassym.c machdep.c pmap.c 
                         swtch.S 
    sys/arm/xscale/i80321 std.i80321 
  Added files:
    sys/arm/xscale       std.xscale 
  Log:
  Instead of using sysarch() to store-retrieve the tp, add a magic address,
  ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache
  line will be allocated and locked for this address, so that it will never go
  to RAM. On CPUs that does not, a page is allocated for it (it will be a bit
  slower, and is wrong for SMP, but should be fine for UP).
  The tp is still stored in the mdthread struct, and at each context switch,
  ARM_TP_ADDRESS gets updated.
  
  Suggested by:   davidxu
  
  Revision  Changes    Path
  1.6       +23 -0     src/sys/arm/arm/cpufunc_asm.S
  1.5       +5 -0      src/sys/arm/arm/genassym.c
  1.14      +11 -2     src/sys/arm/arm/machdep.c
  1.24      +8 -1      src/sys/arm/arm/pmap.c
  1.12      +15 -1     src/sys/arm/arm/swtch.S
  1.2       +2 -0      src/sys/arm/include/machdep.h
  1.8       +1 -0      src/sys/arm/include/pmap.h
  1.4       +2 -0      src/sys/arm/include/sysarch.h
  1.3       +1 -0      src/sys/arm/xscale/i80321/std.i80321
  1.1       +2 -0      src/sys/arm/xscale/std.xscale (new)