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Date:      Mon, 4 Jun 2012 16:04:01 +0000 (UTC)
From:      Zachary Loafman <zml@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r236566 - in head/sys/cddl/dev/dtrace: amd64 i386
Message-ID:  <201206041604.q54G41He051186@svn.freebsd.org>

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Author: zml
Date: Mon Jun  4 16:04:01 2012
New Revision: 236566
URL: http://svn.freebsd.org/changeset/base/236566

Log:
  Fix DTrace TSC skew calculation:
  
  The skew calculation here is exactly backwards. We were able to repro
  it on a multi-package ESX server running a FreeBSD VM, where the TSCs
  can be pretty evil.
  
  MFC after: 1 week
  
  Submitted by: Jeff Ford <jeffrey.ford2@isilon.com>
  Reviewed by: avg, gnn

Modified:
  head/sys/cddl/dev/dtrace/amd64/dtrace_subr.c
  head/sys/cddl/dev/dtrace/i386/dtrace_subr.c

Modified: head/sys/cddl/dev/dtrace/amd64/dtrace_subr.c
==============================================================================
--- head/sys/cddl/dev/dtrace/amd64/dtrace_subr.c	Mon Jun  4 15:21:13 2012	(r236565)
+++ head/sys/cddl/dev/dtrace/amd64/dtrace_subr.c	Mon Jun  4 16:04:01 2012	(r236566)
@@ -446,7 +446,7 @@ dtrace_gethrtime()
 	 * (see nsec_scale calculations) taking into account 32-bit shift of
 	 * the higher half and finally add.
 	 */
-	tsc = rdtsc() + tsc_skew[curcpu];
+	tsc = rdtsc() - tsc_skew[curcpu];
 	lo = tsc;
 	hi = tsc >> 32;
 	return (((lo * nsec_scale) >> SCALE_SHIFT) +

Modified: head/sys/cddl/dev/dtrace/i386/dtrace_subr.c
==============================================================================
--- head/sys/cddl/dev/dtrace/i386/dtrace_subr.c	Mon Jun  4 15:21:13 2012	(r236565)
+++ head/sys/cddl/dev/dtrace/i386/dtrace_subr.c	Mon Jun  4 16:04:01 2012	(r236566)
@@ -447,7 +447,7 @@ dtrace_gethrtime()
 	 * (see nsec_scale calculations) taking into account 32-bit shift of
 	 * the higher half and finally add.
 	 */
-	tsc = rdtsc() + tsc_skew[curcpu];
+	tsc = rdtsc() - tsc_skew[curcpu];
 	lo = tsc;
 	hi = tsc >> 32;
 	return (((lo * nsec_scale) >> SCALE_SHIFT) +



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