From owner-soc-status@freebsd.org Sat Aug 22 14:04:00 2015 Return-Path: Delivered-To: soc-status@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 9EEE09BDF9A for ; Sat, 22 Aug 2015 14:04:00 +0000 (UTC) (envelope-from mihai.carabas@gmail.com) Received: from mail-wi0-x233.google.com (mail-wi0-x233.google.com [IPv6:2a00:1450:400c:c05::233]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 2D3342F9 for ; Sat, 22 Aug 2015 14:04:00 +0000 (UTC) (envelope-from mihai.carabas@gmail.com) Received: by wicja10 with SMTP id ja10so36047366wic.1 for ; Sat, 22 Aug 2015 07:03:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :content-type; bh=eKa67CWBxAnMD5sR3C/z9IoSs07BlaXUScXS2dwDeLA=; b=UF0RLT0d3xJIbxb9kB1SsPccuCoABx8XIoq6fBAAa1RxFgWi3IvdnqeC7MVR3ILuaO kT2ACAx5SbCugdHtOgZTRdzJEGh8UE1OvDvaLO8PtG1ZWqjsHK+6TlROa7wVt+9pqDK5 4FTE5htYLXoas5A9STF0mHvXEFC6BK6OXajoj7pGgxSH/2WaGoqCFUcH7JJHGk8cse0j EFYyqwS8QDu2PwDPS/gQUziYmQ+MuS1AzxoPWZLT21Xa4X0fd9KtFp2Z/UMChNMzTlT0 xxL2sEornWKAup/bEo1wnIzCljqtSQfTy2/fwtM4S1sVuOYUTbmVwFoZ0xv1o/n3RPFW VfGw== MIME-Version: 1.0 X-Received: by 10.194.171.9 with SMTP id aq9mr25625292wjc.30.1440252237794; Sat, 22 Aug 2015 07:03:57 -0700 (PDT) Received: by 10.28.21.132 with HTTP; Sat, 22 Aug 2015 07:03:57 -0700 (PDT) In-Reply-To: References: Date: Sat, 22 Aug 2015 17:03:57 +0300 Message-ID: Subject: Re: [GSOC] bhyve port on ARM - weekly status report From: Mihai Carabas To: soc-status@freebsd.org Content-Type: text/plain; charset=UTF-8 X-Content-Filtered-By: Mailman/MimeDel 2.1.20 X-BeenThere: soc-status@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Summer of Code Status Reports and Discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 22 Aug 2015 14:04:00 -0000 Hello everyone, This is my final status report on this years's GSoC. I'm giving it today because the next week I will be away at a conference in Czech Replubic. In the last week I did work a little in the distributor emulation on the code handling the memory accesses, but the code isn't ready for commit. I've completed the wiki page [1] with the results where I've described every mechanism implemented in bhyve on ARM. I've also added some instruction on how to run FreeBSD on FastModels. I will continue my work on finishing the distributor emulation and using virtual timers for the Guests. I will come with some e-mails out of GSoC when the work will be ready to run easily on real-hardware. Thank you all, Mihai [1] https://wiki.freebsd.org/SummerOfCode2015/PortingBhyveToArm On Mon, Aug 17, 2015 at 8:42 PM, Mihai Carabas wrote: > Hello everyone, > > >> In the past week I managed to boot the guest all the way down to >>> Interrupt Controller initialization [1]. There were minor bugs in the >>> emulation code I had to fix. After that I've start reading the GIC ARM >>> manual and tried to look at other vGIC implementations (virtualization of >>> the Generic Interrupt Controller). I didn't get to write any code yet, I'm >>> still trying to get the whole picture. This would be the last step before >>> being able to run a guest (without timer virtualization - we can use an >>> auxiliary timer mapped to the guest). >>> >> In the last week I've started coding on ARM VGIC infrastructure: >> - I've created a new header file gic.h to export current registers to be >> used by the VGIC >> - I've exported the arm_gic_softc which is used to probe the VGIC >> specific registers (I know it's unclean, but until I find a cleaner method, >> I will go this way -> it's not so clear yet how much of the gic.c internals >> I will need in the vgic.c) >> - I've created in sys/arm/vmm/vgic.c the vgic_hyp_init function which is >> probing the VGIC specific addresses from the DTS file, I've mapped the >> virtual cpu control interface into hyp-mode (to be able to save/restore >> these at each context switch) and saved the virtual cpu interface base for >> later use >> - I've created a new userspace ioctl VMM_ATTACH_VGIC which is sending the >> physical address for the distributor that needs to be emulated and for the >> cpu interface that will be mapped on top of the virtual cpu interface >> - I've created a new function vgic_attach in sys/arm/vmm/vgic.c which is >> called by the previous ioctl which is saving the userspace data, it's >> initializing some structures and maps the cpu control interface >> - We need to do an in-kernel emulation for the VGIC distributor. Further >> I've created a new function called vgic_emulate_distributor which is called >> in the vmm.c code (I know it's unclean, but I wanted to ressemble with x86 >> in-kernel emulation and here I didn't have any defines for the emulated >> addresses, I needed the struct hyp). The vgic_emulate_distributor is >> calling vmm_emulate_instruction which specific handlers for read/write >> emulation. >> >> I will push the code tomorrow. Right now I'm adding some printfs to check >> that the flow for vgic distributor is working ok. >> > > Further I've registered the MMIO callbacks for read/write the distributor > memory ranges and added some prints in there (all the values are ok - now I > have to take some actions based on them). Also I've saved and restore the > VGIC state in the context switch code between Host-OS and VM. Right now the > VM passes the Interrupt Controller initialization, initialize the directly > mapped SP804 timer and after that I get some "spurious interrupts" in the > guest due to lack of distributor emulation implementation. In the next week > I try to implement some of the distributor operations. > > Thank you, > Mihai >