Date: Fri, 13 Dec 1996 22:36:14 -0400 (AST) From: "J.M. Chuang" <smp@bluenose.na.tuns.ca> To: peter@spinner.dialix.com (Peter Wemm) Cc: smp@freebsd.org Subject: Re: Tried SMP kernel from early morning CVS tree Message-ID: <199612140236.WAA19725@bluenose.na.tuns.ca> In-Reply-To: <199612140145.JAA13805@spinner.DIALix.COM> from Peter Wemm at "Dec 14, 96 09:45:16 am"
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> > > Hi all. I tried the SMP kernel from the CVS tree from early this > > > morning. It still has the problem on my 4-CPU Pentium Pro test box > > > where a long compile kills it by getting a kernel page fault in > > > pmap_enter. > > > > I wish I knew how to help with this, but I have neither a P6 machine or > > skills/knowledge in this area... I've been taking advantage of the lull to > > go thru my code and cleanup a lot of little details that have fallen > > thru the cracks. > > Same here, but I've been out of action for different reasons (like: > doing some final work on a new house and preparing to move). > > There were some good details posted on this problem a few days ago > from the other person with the P6 system, there is probably a good > clue in there. My initial reaction to the details was that it > almost looked like both cpu's accessed a shared data structure at > nearly the same time, which should be impossible due to the locking. > I can't imagine why this might be happening yet, but I must re-examine > that part of the code. An extra local tlb flush might help, but > I'm not 100% sure yet. How to do an extra local tlb flush? I found that if Dual P6 is booted from IDE drive with current smp-kernel+ SMP_INVLTLB, coredump and sig11 still show up right after the second CPU activated which is very similar to the problem of dual P5 booted from IDE with current smp-kernl without SMP_INVLTLB. Could this IDE problem for P6 be related to trap 12? Jim
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