Date: Wed, 11 Nov 2020 14:06:45 +0000 (UTC) From: Mark Johnston <markj@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r367591 - in stable/12/sys/amd64: amd64 include Message-ID: <202011111406.0ABE6jJ0060539@repo.freebsd.org>
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Author: markj Date: Wed Nov 11 14:06:45 2020 New Revision: 367591 URL: https://svnweb.freebsd.org/changeset/base/367591 Log: MFC r367335: amd64: Make it easier to configure exception stack sizes Modified: stable/12/sys/amd64/amd64/machdep.c stable/12/sys/amd64/amd64/mp_machdep.c stable/12/sys/amd64/amd64/pmap.c stable/12/sys/amd64/include/intr_machdep.h Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/amd64/amd64/machdep.c ============================================================================== --- stable/12/sys/amd64/amd64/machdep.c Wed Nov 11 14:03:49 2020 (r367590) +++ stable/12/sys/amd64/amd64/machdep.c Wed Nov 11 14:06:45 2020 (r367591) @@ -679,10 +679,10 @@ struct user_segment_descriptor gdt[NGDT * MAXCPU];/* g static struct gate_descriptor idt0[NIDT]; struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ -static char dblfault_stack[PAGE_SIZE] __aligned(16); -static char mce0_stack[PAGE_SIZE] __aligned(16); -static char nmi0_stack[PAGE_SIZE] __aligned(16); -static char dbg0_stack[PAGE_SIZE] __aligned(16); +static char dblfault_stack[DBLFAULT_STACK_SIZE] __aligned(16); +static char mce0_stack[MCE_STACK_SIZE] __aligned(16); +static char nmi0_stack[NMI_STACK_SIZE] __aligned(16); +static char dbg0_stack[DBG_STACK_SIZE] __aligned(16); CTASSERT(sizeof(struct nmi_pcpu) == 16); struct amd64tss common_tss[MAXCPU]; Modified: stable/12/sys/amd64/amd64/mp_machdep.c ============================================================================== --- stable/12/sys/amd64/amd64/mp_machdep.c Wed Nov 11 14:03:49 2020 (r367590) +++ stable/12/sys/amd64/amd64/mp_machdep.c Wed Nov 11 14:06:45 2020 (r367591) @@ -300,18 +300,19 @@ init_secondary(void) common_tss[cpu] = common_tss[0]; common_tss[cpu].tss_iobase = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE; - common_tss[cpu].tss_ist1 = (long)&doublefault_stack[PAGE_SIZE]; + common_tss[cpu].tss_ist1 = + (long)&doublefault_stack[DBLFAULT_STACK_SIZE]; /* The NMI stack runs on IST2. */ - np = ((struct nmi_pcpu *) &nmi_stack[PAGE_SIZE]) - 1; + np = ((struct nmi_pcpu *)&nmi_stack[NMI_STACK_SIZE]) - 1; common_tss[cpu].tss_ist2 = (long) np; /* The MC# stack runs on IST3. */ - np = ((struct nmi_pcpu *) &mce_stack[PAGE_SIZE]) - 1; + np = ((struct nmi_pcpu *)&mce_stack[MCE_STACK_SIZE]) - 1; common_tss[cpu].tss_ist3 = (long) np; /* The DB# stack runs on IST4. */ - np = ((struct nmi_pcpu *) &dbg_stack[PAGE_SIZE]) - 1; + np = ((struct nmi_pcpu *)&dbg_stack[DBG_STACK_SIZE]) - 1; common_tss[cpu].tss_ist4 = (long) np; /* Prepare private GDT */ @@ -353,15 +354,15 @@ init_secondary(void) common_tss[cpu].tss_rsp0 = 0; /* Save the per-cpu pointer for use by the NMI handler. */ - np = ((struct nmi_pcpu *) &nmi_stack[PAGE_SIZE]) - 1; + np = ((struct nmi_pcpu *)&nmi_stack[NMI_STACK_SIZE]) - 1; np->np_pcpu = (register_t) pc; /* Save the per-cpu pointer for use by the MC# handler. */ - np = ((struct nmi_pcpu *) &mce_stack[PAGE_SIZE]) - 1; + np = ((struct nmi_pcpu *)&mce_stack[MCE_STACK_SIZE]) - 1; np->np_pcpu = (register_t) pc; /* Save the per-cpu pointer for use by the DB# handler. */ - np = ((struct nmi_pcpu *) &dbg_stack[PAGE_SIZE]) - 1; + np = ((struct nmi_pcpu *)&dbg_stack[DBG_STACK_SIZE]) - 1; np->np_pcpu = (register_t) pc; wrmsr(MSR_FSBASE, 0); /* User value */ @@ -488,13 +489,14 @@ native_start_all_aps(void) /* allocate and set up an idle stack data page */ bootstacks[cpu] = (void *)kmem_malloc(kstack_pages * PAGE_SIZE, M_WAITOK | M_ZERO); - doublefault_stack = (char *)kmem_malloc(PAGE_SIZE, M_WAITOK | - M_ZERO); - mce_stack = (char *)kmem_malloc(PAGE_SIZE, M_WAITOK | M_ZERO); + doublefault_stack = (char *)kmem_malloc(DBLFAULT_STACK_SIZE, + M_WAITOK | M_ZERO); + mce_stack = (char *)kmem_malloc(MCE_STACK_SIZE, + M_WAITOK | M_ZERO); nmi_stack = (char *)kmem_malloc_domainset( - DOMAINSET_PREF(domain), PAGE_SIZE, M_WAITOK | M_ZERO); + DOMAINSET_PREF(domain), NMI_STACK_SIZE, M_WAITOK | M_ZERO); dbg_stack = (char *)kmem_malloc_domainset( - DOMAINSET_PREF(domain), PAGE_SIZE, M_WAITOK | M_ZERO); + DOMAINSET_PREF(domain), DBG_STACK_SIZE, M_WAITOK | M_ZERO); dpcpu = (void *)kmem_malloc_domainset(DOMAINSET_PREF(domain), DPCPU_SIZE, M_WAITOK | M_ZERO); Modified: stable/12/sys/amd64/amd64/pmap.c ============================================================================== --- stable/12/sys/amd64/amd64/pmap.c Wed Nov 11 14:03:49 2020 (r367590) +++ stable/12/sys/amd64/amd64/pmap.c Wed Nov 11 14:06:45 2020 (r367591) @@ -156,6 +156,7 @@ __FBSDID("$FreeBSD$"); #include <x86/ifunc.h> #include <machine/cpu.h> #include <machine/cputypes.h> +#include <machine/intr_machdep.h> #include <machine/md_var.h> #include <machine/pcb.h> #include <machine/specialreg.h> @@ -9637,16 +9638,16 @@ pmap_pti_init(void) CPU_FOREACH(i) { /* Doublefault stack IST 1 */ va = common_tss[i].tss_ist1; - pmap_pti_add_kva_locked(va - PAGE_SIZE, va, false); + pmap_pti_add_kva_locked(va - DBLFAULT_STACK_SIZE, va, false); /* NMI stack IST 2 */ va = common_tss[i].tss_ist2 + sizeof(struct nmi_pcpu); - pmap_pti_add_kva_locked(va - PAGE_SIZE, va, false); + pmap_pti_add_kva_locked(va - NMI_STACK_SIZE, va, false); /* MC# stack IST 3 */ va = common_tss[i].tss_ist3 + sizeof(struct nmi_pcpu); - pmap_pti_add_kva_locked(va - PAGE_SIZE, va, false); + pmap_pti_add_kva_locked(va - MCE_STACK_SIZE, va, false); /* DB# stack IST 4 */ va = common_tss[i].tss_ist4 + sizeof(struct nmi_pcpu); - pmap_pti_add_kva_locked(va - PAGE_SIZE, va, false); + pmap_pti_add_kva_locked(va - DBG_STACK_SIZE, va, false); } pmap_pti_add_kva_locked((vm_offset_t)kernphys + KERNBASE, (vm_offset_t)etext, true); Modified: stable/12/sys/amd64/include/intr_machdep.h ============================================================================== --- stable/12/sys/amd64/include/intr_machdep.h Wed Nov 11 14:03:49 2020 (r367590) +++ stable/12/sys/amd64/include/intr_machdep.h Wed Nov 11 14:06:45 2020 (r367591) @@ -41,4 +41,9 @@ struct nmi_pcpu { register_t __padding; /* pad to 16 bytes */ }; +#define DBLFAULT_STACK_SIZE PAGE_SIZE +#define NMI_STACK_SIZE PAGE_SIZE +#define MCE_STACK_SIZE PAGE_SIZE +#define DBG_STACK_SIZE PAGE_SIZE + #endif /* !__MACHINE_INTR_MACHDEP_H__ */
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