From owner-svn-src-all@freebsd.org Mon Oct 12 11:40:44 2020 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 5085E434D26; Mon, 12 Oct 2020 11:40:44 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4C8xZN1T3Vz45ml; Mon, 12 Oct 2020 11:40:44 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id F078AC086; Mon, 12 Oct 2020 11:40:43 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 09CBehwE003927; Mon, 12 Oct 2020 11:40:43 GMT (envelope-from avg@FreeBSD.org) Received: (from avg@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 09CBehMY003925; Mon, 12 Oct 2020 11:40:43 GMT (envelope-from avg@FreeBSD.org) Message-Id: <202010121140.09CBehMY003925@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: avg set sender to avg@FreeBSD.org using -f From: Andriy Gapon Date: Mon, 12 Oct 2020 11:40:43 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r366646 - stable/12/sys/dev/iicbus/twsi X-SVN-Group: stable-12 X-SVN-Commit-Author: avg X-SVN-Commit-Paths: stable/12/sys/dev/iicbus/twsi X-SVN-Commit-Revision: 366646 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 12 Oct 2020 11:40:44 -0000 Author: avg Date: Mon Oct 12 11:40:43 2020 New Revision: 366646 URL: https://svnweb.freebsd.org/changeset/base/366646 Log: MFC r365397: twsi: some variants clear interrupt flag by writing 0, others by writing 1 Make that distinction more explicit and regular in the code. The difference in behavior is documented in the respective datasheets. Previously, the code handled the distinction by writing the control register multiple times where at least one write was zero and another was one. This can be considered a follow-up to r363021 (MFC-ed as r366645). Modified: stable/12/sys/dev/iicbus/twsi/a10_twsi.c stable/12/sys/dev/iicbus/twsi/twsi.c stable/12/sys/dev/iicbus/twsi/twsi.h Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/dev/iicbus/twsi/a10_twsi.c ============================================================================== --- stable/12/sys/dev/iicbus/twsi/a10_twsi.c Mon Oct 12 11:34:09 2020 (r366645) +++ stable/12/sys/dev/iicbus/twsi/a10_twsi.c Mon Oct 12 11:40:43 2020 (r366646) @@ -122,6 +122,10 @@ a10_twsi_attach(device_t dev) sc->reg_soft_reset = TWI_SRST; sc->need_ack = true; + + if (ofw_bus_is_compatible(dev, "allwinner,sun6i-a31-i2c") || + ofw_bus_is_compatible(dev, "allwinner,sun6i-a83t-i2c")) + sc->iflag_w1c = true; return (twsi_attach(dev)); } Modified: stable/12/sys/dev/iicbus/twsi/twsi.c ============================================================================== --- stable/12/sys/dev/iicbus/twsi/twsi.c Mon Oct 12 11:34:09 2020 (r366645) +++ stable/12/sys/dev/iicbus/twsi/twsi.c Mon Oct 12 11:40:43 2020 (r366646) @@ -147,7 +147,11 @@ twsi_clear_iflg(struct twsi_softc *sc) { DELAY(1000); - twsi_control_clear(sc, TWSI_CONTROL_IFLG); + /* There are two ways of clearing IFLAG. */ + if (sc->iflag_w1c) + twsi_control_set(sc, TWSI_CONTROL_IFLG); + else + twsi_control_clear(sc, TWSI_CONTROL_IFLG); DELAY(1000); } @@ -667,13 +671,11 @@ twsi_intr(void *arg) } debugf(sc->dev, "Refresh reg_control\n"); - /* - * Fix silicon bug on > Allwinner A20 by doing a read and writing - * again to the control register + /* + * Newer Allwinner chips clear IFLG after writing 1 to it. */ - status = TWSI_READ(sc, sc->reg_status); - TWSI_WRITE(sc, sc->reg_control, - sc->control_val | TWSI_CONTROL_IFLG); + TWSI_WRITE(sc, sc->reg_control, sc->control_val | + (sc->iflag_w1c ? TWSI_CONTROL_IFLG : 0)); debugf(sc->dev, "Done with interrupts\n\n"); if (transfer_done == 1) { Modified: stable/12/sys/dev/iicbus/twsi/twsi.h ============================================================================== --- stable/12/sys/dev/iicbus/twsi/twsi.h Mon Oct 12 11:34:09 2020 (r366645) +++ stable/12/sys/dev/iicbus/twsi/twsi.h Mon Oct 12 11:40:43 2020 (r366646) @@ -66,6 +66,7 @@ struct twsi_softc { int error; uint32_t control_val; bool need_ack; + bool iflag_w1c; bus_size_t reg_data; bus_size_t reg_slave_addr;